Publications

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Filters: Author is Frederic Vivien  [Clear All Filters]
Conference Paper
Aupy, G., Y. Robert, and F. Vivien, “Assuming failure independence: are we right to be wrong?,” The 3rd International Workshop on Fault Tolerant Systems (FTS), Honolulu, Hawaii, IEEE, September 2017.  (597.11 KB)
Han, L., L-C. Canon, H. Casanova, Y. Robert, and F. Vivien, “Checkpointing Workflows for Fail-Stop Errors,” IEEE Cluster, Honolulu, Hawaii, IEEE, September 2017.  (400.64 KB)
Han, L., Y. Gao, J. Liu, Y. Robert, and F. Vivien, “Energy-Aware Strategies for Reliability-Oriented Real-Time Task Allocation on Heterogeneous Platforms,” 49th International Conference on Parallel Processing (ICPP 2020), Edmonton, AB, Canada, ACM Press, 2020.  (804.96 KB)
Han, L., V. Le Fèvre, L-C. Canon, Y. Robert, and F. Vivien, “A Generic Approach to Scheduling and Checkpointing Workflows,” The 47th International Conference on Parallel Processing (ICPP 2018), Eugene, OR, IEEE Computer Society Press, August 2018.  (737.11 KB)
Han, L., L-C. Canon, J. Liu, Y. Robert, and F. Vivien, “Improved Energy-Aware Strategies for Periodic Real-Time Tasks under Reliability Constraints,” 40th IEEE Real-Time Systems Symposium (RTSS 2019), York, UK, IEEE Press, February 2020.
Gao, Y., L-C. Canon, Y. Robert, and F. Vivien, “Scheduling Independent Stochastic Tasks on Heterogeneous Cloud Platforms,” IEEE Cluster 2019, Albuquerque, New Mexico, IEEE Computer Society Press, September 2019.  (651 KB)
Barbut, Q., A. Benoit, T. Herault, Y. Robert, and F. Vivien, “When to checkpoint at the end of a fixed-length reservation?,” Fault Tolerance for HPC at eXtreme Scales (FTXS) Workshop, Denver, United States, August 2023.
Conference Proceedings
Benoit, A., Y. Du, T. Herault, L. Marchal, G. Pallez, L. Perotin, Y. Robert, H. Sun, and F. Vivien, “Checkpointing à la Young/Daly: An Overview,” IC3-2022: Proceedings of the 2022 Fourteenth International Conference on Contemporary Computing, Noida, India, ACM Press, pp. 701-710, August 2022. DOI: 10.1145/3549206  (639.77 KB)
Gao, Y., G. Pallez, Y. Robert, and F. Vivien, “Evaluating Task Dropping Strategies for Overloaded Real-Time Systems (Work-In-Progress),” 42nd Real Time Systems Symposium (RTSS): IEEE Computer Society Press, 2021.  (217.13 KB)
Dongarra, J., J-F. Pineau, Y. Robert, and F. Vivien, “Matrix Product on Heterogeneous Master Worker Platforms,” 2008 PPoPP Conference, Salt Lake City, Utah, January 2008.
Journal Article
Boulet, P., J. Dongarra, F. Rastello, Y. Robert, and F. Vivien, “Algorithmic Issues on Heterogeneous Computing Platforms,” Parallel Processing Letters, vol. 9, no. 2, pp. 197-213, January 1999.  (301.17 KB)
Han, L., L-C. Canon, H. Casanova, Y. Robert, and F. Vivien, “Checkpointing Workflows for Fail-Stop Errors,” IEEE Transactions on Computers, vol. 67, issue 8, pp. 1105–1120, August 2018.
Han, L., V. Le Fèvre, L-C. Canon, Y. Robert, and F. Vivien, “A Generic Approach to Scheduling and Checkpointing Workflows,” International Journal of High Performance Computing Applications, vol. 33, issue 6, pp. 1255-1274, November 2019. DOI: 10.1177/1094342019866891  (555.01 KB)
Dongarra, J., J-F. Pineau, Y. Robert, Z. Shi, and F. Vivien, “Revisiting Matrix Product on Master-Worker Platforms,” International Journal of Foundations of Computer Science (IJFCS) (accepted), 00 2007.  (248.66 KB)
Dongarra, J., J-F. Pineau, Y. Robert, Z. Shi, and F. Vivien, “Revisiting Matrix Product on Master-Worker Platforms,” International Journal of Foundations of Computer Science (IJFCS), vol. 19, no. 6, pp. 1317-1336, December 2008.  (248.66 KB)
Canon, L-C., A K W. Chang, Y. Robert, and F. Vivien, “Scheduling Independent Stochastic Tasks under Deadline and Budget Constraints,” International Journal of High Performance Computing Applications, vol. 34, issue 2, pp. 246-264, June 2019. DOI: 10.1177/1094342019852135  (427.92 KB)
Boulet, P., J. Dongarra, Y. Robert, and F. Vivien, “Static Tiling for Heterogeneous Computing Platforms,” Parallel Computing, vol. 25, no. 5, pp. 547-568, January 1999.  (301.17 KB)
Bosilca, G., A. Bouteiller, E. Brunet, F. Cappello, J. Dongarra, A. Guermouche, T. Herault, Y. Robert, F. Vivien, and D. Zaidouni, “Unified Model for Assessing Checkpointing Protocols at Extreme-Scale,” Concurrency and Computation: Practice and Experience, November 2013. DOI: 10.1002/cpe.3173  (894.61 KB)
Report
Benoit, A., T. Herault, L. Perotin, Y. Robert, and F. Vivien, “Revisiting I/O bandwidth-sharing strategies for HPC applications,” INRIA Research Report, no. RR-9502: INRIA, March 2023.
Tech Report
Aupy, G., A. Benoit, T. Herault, Y. Robert, F. Vivien, and D. Zaidouni, “On the Combination of Silent Error Detection and Checkpointing,” UT-CS-13-710: University of Tennessee Computer Science Technical Report, June 2013.  (1.29 MB)
Bosilca, G., A. Bouteiller, E. Brunet, F. Cappello, J. Dongarra, A. Guermouche, T. Herault, Y. Robert, F. Vivien, and D. Zaidouni, “Unified Model for Assessing Checkpointing Protocols at Extreme-Scale,” University of Tennessee Computer Science Technical Report (also LAWN 269), no. UT-CS-12-697, June 2012.  (2.76 MB)