pfmlib_pentium4.c File Reference

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Data Structures
struct	p4_regmap_t

Macros
#define	_GNU_SOURCE   /* for getline */
#define	P4_REGMAP(a, n)   { .addr = a, .name = n }
#define	PMC_PEBS_MATRIX_VERT   63
#define	PMC_PEBS_ENABLE   64
#define	P4_REPLAY_REAL_MASK   0x00000003
#define	P4_REPLAY_VIRT_MASK   0x00000FFC

Functions
static int	pentium4_get_event_code (unsigned int event, unsigned int pmd, int *code)
static char *	pentium4_get_event_name (unsigned int event)
static char *	pentium4_get_event_mask_name (unsigned int event, unsigned int mask)
static void	pentium4_get_event_counters (unsigned int event, pfmlib_regmask_t *counters)
static unsigned int	pentium4_get_num_event_masks (unsigned int event)
static int	pentium4_dispatch_events (pfmlib_input_param_t *input, void *model_input, pfmlib_output_param_t *output, void *model_output)
static int	pentium4_pmu_detect (void)
static void	pentium4_get_impl_pmcs (pfmlib_regmask_t *impl_pmcs)
static void	pentium4_get_impl_pmds (pfmlib_regmask_t *impl_pmds)
static void	pentium4_get_impl_counters (pfmlib_regmask_t *impl_counters)
static void	pentium4_get_hw_counter_width (unsigned int *width)
static int	pentium4_get_event_desc (unsigned int event, char **desc)
static int	pentium4_get_event_mask_desc (unsigned int event, unsigned int mask, char **desc)
static int	pentium4_get_event_mask_code (unsigned int event, unsigned int mask, unsigned int *code)
static int	pentium4_get_cycle_event (pfmlib_event_t *e)
static int	pentium4_get_inst_retired (pfmlib_event_t *e)

Variables
static p4_regmap_t	p4_pmc_regmap []
static p4_regmap_t	p4_pmd_regmap []
static pentium4_replay_regs_t	p4_replay_regs []
static int	p4_model
pfm_pmu_support_t	pentium4_support

Macro Definition Documentation

_GNU_SOURCE

#define _GNU_SOURCE   /* for getline */

Definition at line 30 of file pfmlib_pentium4.c.

P4_REGMAP

#define P4_REGMAP	(		a,
			n
	)		{ .addr = a, .name = n }

Definition at line 48 of file pfmlib_pentium4.c.

P4_REPLAY_REAL_MASK

#define P4_REPLAY_REAL_MASK   0x00000003

Definition at line 149 of file pfmlib_pentium4.c.

P4_REPLAY_VIRT_MASK

#define P4_REPLAY_VIRT_MASK   0x00000FFC

Definition at line 150 of file pfmlib_pentium4.c.

PMC_PEBS_ENABLE

#define PMC_PEBS_ENABLE   64

Definition at line 119 of file pfmlib_pentium4.c.

PMC_PEBS_MATRIX_VERT

#define PMC_PEBS_MATRIX_VERT   63

Definition at line 118 of file pfmlib_pentium4.c.

Function Documentation

pentium4_dispatch_events()

static int pentium4_dispatch_events ( pfmlib_input_param_t *  input, void *  model_input, pfmlib_output_param_t *  output, void *  model_output  )

static

pentium4_dispatch_events

Examine each desired event specified in "input" and find an appropriate ESCR/CCCR pair that can be used to count them.

Definition at line 317 of file pfmlib_pentium4.c.

{
    unsigned int assigned_pmcs[PENTIUM4_NUM_PMCS] = {0};
    unsigned int event, event_mask, mask;
    unsigned int bit, tag_value, tag_enable;
    unsigned int plm;
    unsigned int i, j, k, m, n;
    int escr, escr_pmc;
    int cccr, cccr_pmc, cccr_pmd;
    int assigned;
    pentium4_escr_value_t escr_value;
    pentium4_cccr_value_t cccr_value;
 
    if (input->pfp_event_count > PENTIUM4_NUM_PMDS) {
        /* Can't specify more events than we have counters. */
        return PFMLIB_ERR_TOOMANY;
    }
 
    if (input->pfp_dfl_plm & (PFM_PLM1|PFM_PLM2)) {
        /* Can't specify privilege levels 1 or 2. */
        return PFMLIB_ERR_INVAL;
    }
 
    /* Examine each event specified in input->pfp_events. i counts
     * through the input->pfp_events array, and j counts through the
     * PMCs in output->pfp_pmcs as they are set up.
     */
    for (i = 0, j = 0; i < input->pfp_event_count; i++) {
 
        if (input->pfp_events[i].plm & (PFM_PLM1|PFM_PLM2)) {
            /* Can't specify privilege levels 1 or 2. */
            return PFMLIB_ERR_INVAL;
        }
 
        /*
         * INSTR_COMPLETED event only exist for model 3, 4, 6 (Prescott)
         */
        if (input->pfp_events[i].event == PME_INSTR_COMPLETED &&
            p4_model != 3 && p4_model != 4 && p4_model != 6)
                return PFMLIB_ERR_EVTINCOMP;
 
        event = input->pfp_events[i].event;
        assigned = 0;
 
        /* Use the event-specific privilege mask if set.
         * Otherwise use the default privilege mask.
         */
        plm = input->pfp_events[i].plm ?
              input->pfp_events[i].plm : input->pfp_dfl_plm;
 
        /* Examine each ESCR that this event could be assigned to. */
        for (k = 0; k < MAX_ESCRS_PER_EVENT && !assigned; k++) {
            escr = pentium4_events[event].allowed_escrs[k];
            if (escr < 0)
                continue;
 
            /* Make sure this ESCR isn't already assigned
             * and isn't on the "unavailable" list.
             */
            escr_pmc = pentium4_escrs[escr].pmc;
            if (assigned_pmcs[escr_pmc] ||
                pfm_regmask_isset(&input->pfp_unavail_pmcs, escr_pmc)) {
                continue;
            }
 
            /* Examine each CCCR that can be used with this ESCR. */
            for (m = 0; m < MAX_CCCRS_PER_ESCR && !assigned; m++) {
                cccr = pentium4_escrs[escr].allowed_cccrs[m];
                if (cccr < 0) {
                    continue;
                }
 
                /* Make sure this CCCR isn't already assigned
                 * and isn't on the "unavailable" list.
                 */
                cccr_pmc = pentium4_cccrs[cccr].pmc;
                cccr_pmd = pentium4_cccrs[cccr].pmd;
                if (assigned_pmcs[cccr_pmc] ||
                    pfm_regmask_isset(&input->pfp_unavail_pmcs, cccr_pmc)) {
                    continue;
                }
 
                /* Found an available ESCR/CCCR pair. */
                assigned = 1;
                assigned_pmcs[escr_pmc] = 1;
                assigned_pmcs[cccr_pmc] = 1;
 
                /* Calculate the event-mask value. Invalid masks
                 * specified by the caller are ignored.
                 */
                event_mask = 0;
                tag_value = 0;
                tag_enable = 0;
                for (n = 0; n < input->pfp_events[i].num_masks; n++) {
                    mask = input->pfp_events[i].unit_masks[n];
                    bit = pentium4_events[event].event_masks[mask].bit;
                    if (bit < EVENT_MASK_BITS &&
                        pentium4_events[event].event_masks[mask].name) {
                        event_mask |= (1 << bit);
                    }
                    if (bit >= EVENT_MASK_BITS &&
                        pentium4_events[event].event_masks[mask].name) {
                        tag_value |= (1 << (bit - EVENT_MASK_BITS));
                        tag_enable = 1;
                    }
                }
 
                /* Set up the ESCR and CCCR register values. */
                escr_value.val = 0;
 
                escr_value.bits.t1_usr       = 0; /* controlled by kernel */
                escr_value.bits.t1_os        = 0; /* controlled by kernel */
                escr_value.bits.t0_usr       = (plm & PFM_PLM3) ? 1 : 0;
                escr_value.bits.t0_os        = (plm & PFM_PLM0) ? 1 : 0;
                escr_value.bits.tag_enable   = tag_enable;
                escr_value.bits.tag_value    = tag_value;
                escr_value.bits.event_mask   = event_mask;
                escr_value.bits.event_select = pentium4_events[event].event_select;
                escr_value.bits.reserved     = 0;
 
                cccr_value.val = 0;
 
                cccr_value.bits.reserved1     = 0;
                cccr_value.bits.enable        = 1;
                cccr_value.bits.escr_select   = pentium4_events[event].escr_select;
                cccr_value.bits.active_thread = 3; /* FIXME: This is set to count when either logical
                                    *        CPU is active. Need a way to distinguish
                                    *        between logical CPUs when HT is enabled. */
                cccr_value.bits.compare       = 0; /* FIXME: What do we do with "threshold" settings? */
                cccr_value.bits.complement    = 0; /* FIXME: What do we do with "threshold" settings? */
                cccr_value.bits.threshold     = 0; /* FIXME: What do we do with "threshold" settings? */
                cccr_value.bits.force_ovf     = 0; /* FIXME: Do we want to allow "forcing" overflow
                                    *        interrupts on all counter increments? */
                cccr_value.bits.ovf_pmi_t0    = 1;
                cccr_value.bits.ovf_pmi_t1    = 0; /* PMI taken care of by kernel typically */
                cccr_value.bits.reserved2     = 0;
                cccr_value.bits.cascade       = 0; /* FIXME: How do we handle "cascading" counters? */
                cccr_value.bits.overflow      = 0;
 
                /* Special processing for the replay event:
                    Remove virtual mask bits from actual mask;
                    scan mask bit list and OR bit values for each virtual mask
                    into the PEBS ENABLE and PEBS MATRIX VERT registers */
                if (event == PME_REPLAY_EVENT) {
                    escr_value.bits.event_mask &= P4_REPLAY_REAL_MASK;   /* remove virtual mask bits */
                    if (event_mask & P4_REPLAY_VIRT_MASK) {              /* find a valid virtual mask */
                        output->pfp_pmcs[j].reg_value = 0;
                        output->pfp_pmcs[j].reg_num = PMC_PEBS_ENABLE;
                        output->pfp_pmcs[j].reg_addr = p4_pmc_regmap[PMC_PEBS_ENABLE].addr;
                        output->pfp_pmcs[j+1].reg_value = 0;
                        output->pfp_pmcs[j+1].reg_num = PMC_PEBS_MATRIX_VERT;
                        output->pfp_pmcs[j+1].reg_addr = p4_pmc_regmap[PMC_PEBS_MATRIX_VERT].addr;
                        for (n = 0; n < input->pfp_events[i].num_masks; n++) {
                            mask = input->pfp_events[i].unit_masks[n];
                            if (mask > 1 && mask < 11) { /* process each valid mask we find */
                                output->pfp_pmcs[j].reg_value |= p4_replay_regs[mask].enb;
                                output->pfp_pmcs[j+1].reg_value |= p4_replay_regs[mask].mat_vert;
                            }
                        }
                        j += 2;
                        output->pfp_pmc_count += 2;
                    }
                }
 
                 /* Set up the PMCs in the
                 * output->pfp_pmcs array.
                 */
                output->pfp_pmcs[j].reg_num = escr_pmc;
                output->pfp_pmcs[j].reg_value = escr_value.val;
                output->pfp_pmcs[j].reg_addr = p4_pmc_regmap[escr_pmc].addr;
                j++;
 
                __pfm_vbprintf("[%s(pmc%u)=0x%lx os=%u usr=%u tag=%u tagval=0x%x mask=%u sel=0x%x] %s\n",
                        p4_pmc_regmap[escr_pmc].name,
                        escr_pmc,
                        escr_value.val,
                        escr_value.bits.t0_os,
                        escr_value.bits.t0_usr,
                        escr_value.bits.tag_enable,
                        escr_value.bits.tag_value,
                        escr_value.bits.event_mask,
                        escr_value.bits.event_select,
                        pentium4_events[event].name);
 
                output->pfp_pmcs[j].reg_num = cccr_pmc;
                output->pfp_pmcs[j].reg_value = cccr_value.val;
                output->pfp_pmcs[j].reg_addr = p4_pmc_regmap[cccr_pmc].addr;
 
                output->pfp_pmds[i].reg_num = cccr_pmd;
                output->pfp_pmds[i].reg_addr = p4_pmd_regmap[cccr_pmd].addr;
 
                __pfm_vbprintf("[%s(pmc%u)=0x%lx ena=1 sel=0x%x cmp=%u cmpl=%u thres=%u edg=%u cas=%u] %s\n",
                        p4_pmc_regmap[cccr_pmc].name,
                        cccr_pmc,
                        cccr_value.val,
                        cccr_value.bits.escr_select,
                        cccr_value.bits.compare,
                        cccr_value.bits.complement,
                        cccr_value.bits.threshold,
                        cccr_value.bits.edge,
                        cccr_value.bits.cascade,
                        pentium4_events[event].name);
                __pfm_vbprintf("[%s(pmd%u)]\n", p4_pmd_regmap[output->pfp_pmds[i].reg_num].name, output->pfp_pmds[i].reg_num);
                j++;
 
                output->pfp_pmc_count += 2;
            }
        }
        if (k == MAX_ESCRS_PER_EVENT && !assigned) {
            /* Couldn't find an available ESCR and/or CCCR. */
            return PFMLIB_ERR_NOASSIGN;
        }
    }
    output->pfp_pmd_count = input->pfp_event_count;
 
    return PFMLIB_SUCCESS;
}

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pentium4_get_cycle_event()

static int pentium4_get_cycle_event ( pfmlib_event_t *  e )

static

Definition at line 689 of file pfmlib_pentium4.c.

{
    e->event = PENTIUM4_CPU_CLK_UNHALTED;
    e->num_masks = 1;
    e->unit_masks[0] = 0;
    return PFMLIB_SUCCESS;
 
}

pentium4_get_event_code()

static int pentium4_get_event_code ( unsigned int  event, unsigned int  pmd, int *  code  )

static

pentium4_get_event_code

Return the event-select value for the specified event as needed for the specified PMD counter.

Definition at line 196 of file pfmlib_pentium4.c.

{
    int i, j, escr, cccr;
    int rc = PFMLIB_ERR_INVAL;
 
    if (pmd >= PENTIUM4_NUM_PMDS && pmd != PFMLIB_CNT_FIRST) {
        goto out;
    }
 
    /* Check that the specified event is allowed for the specified PMD.
     * Each event has a specific set of ESCRs it can use, which implies
     * a specific set of CCCRs (and thus PMDs). A specified PMD of -1
     * means assume any allowable PMD.
     */
    if (pmd == PFMLIB_CNT_FIRST) {
        *code = pentium4_events[event].event_select;
        rc = PFMLIB_SUCCESS;
        goto out;
    }
 
    for (i = 0; i < MAX_ESCRS_PER_EVENT; i++) {
        escr = pentium4_events[event].allowed_escrs[i];
        if (escr < 0) {
            continue;
        }
 
        for (j = 0; j < MAX_CCCRS_PER_ESCR; j++) {
            cccr = pentium4_escrs[escr].allowed_cccrs[j];
            if (cccr < 0) {
                continue;
            }
 
            if (pmd == pentium4_cccrs[cccr].pmd) {
                *code = pentium4_events[event].event_select;
                rc = PFMLIB_SUCCESS;
                goto out;
            }
        }
    }
 
out:
    return rc;
}

pentium4_get_event_counters()

static void pentium4_get_event_counters ( unsigned int  event, pfmlib_regmask_t *  counters  )

static

pentium4_get_event_counters

Fill in the 'counters' bitmask with all possible PMDs that could be used to count the specified event.

Definition at line 271 of file pfmlib_pentium4.c.

{
    int i, j, escr, cccr;
 
    memset(counters, 0, sizeof(*counters));
 
    for (i = 0; i < MAX_ESCRS_PER_EVENT; i++) {
        escr = pentium4_events[event].allowed_escrs[i];
        if (escr < 0) {
            continue;
        }
 
        for (j = 0; j < MAX_CCCRS_PER_ESCR; j++) {
            cccr = pentium4_escrs[escr].allowed_cccrs[j];
            if (cccr < 0) {
                continue;
            }
            pfm_regmask_set(counters, pentium4_cccrs[cccr].pmd);
        }
    }
}

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pentium4_get_event_desc()

static int pentium4_get_event_desc ( unsigned int  event, char **  desc  )

static

pentium4_get_event_desc

Return the description for the specified event (if it has one).

FIXME: In this routine, we make a copy of the description string to return. But in get_event_name(), we just return the string directly. Why the difference?

Definition at line 654 of file pfmlib_pentium4.c.

{
    if (pentium4_events[event].desc) {
        *desc = strdup(pentium4_events[event].desc);
    } else {
        *desc = NULL;
    }
 
    return PFMLIB_SUCCESS;
}

pentium4_get_event_mask_code()

static int pentium4_get_event_mask_code ( unsigned int  event, unsigned int  mask, unsigned int *  code  )

static

Definition at line 681 of file pfmlib_pentium4.c.

{
    *code = 1U << pentium4_events[event].event_masks[mask].bit;
    return PFMLIB_SUCCESS;
}

pentium4_get_event_mask_desc()

static int pentium4_get_event_mask_desc ( unsigned int  event, unsigned int  mask, char **  desc  )

static

pentium4_get_event_mask_desc

Return the description for the specified event-mask (if it has one).

Definition at line 670 of file pfmlib_pentium4.c.

{
    if (mask >= EVENT_MASK_BITS || pentium4_events[event].event_masks[mask].desc == NULL)
        return PFMLIB_ERR_INVAL;
 
    *desc = strdup(pentium4_events[event].event_masks[mask].desc);
 
    return PFMLIB_SUCCESS;
}

pentium4_get_event_mask_name()

static char * pentium4_get_event_mask_name ( unsigned int  event, unsigned int  mask  )

static

pentium4_get_event_mask_name

Return the name of the specified event-mask.

Definition at line 257 of file pfmlib_pentium4.c.

{
    if (mask >= EVENT_MASK_BITS || pentium4_events[event].event_masks[mask].name == NULL)
        return NULL;
 
    return pentium4_events[event].event_masks[mask].name;
}

pentium4_get_event_name()

static char * pentium4_get_event_name ( unsigned int  event )

static

pentium4_get_event_name

Return the name of the specified event.

Definition at line 247 of file pfmlib_pentium4.c.

{
    return pentium4_events[event].name;
}

pentium4_get_hw_counter_width()

static void pentium4_get_hw_counter_width ( unsigned int *  width )

static

pentium4_get_hw_counter_width

Return the number of usable bits in the PMD counters.

Definition at line 640 of file pfmlib_pentium4.c.

{
    *width = PENTIUM4_COUNTER_WIDTH;
}

pentium4_get_impl_counters()

static void pentium4_get_impl_counters ( pfmlib_regmask_t *  impl_counters )

static

pentium4_get_impl_counters

Set the appropriate bit in the impl_counters bitmask for each counter that's available on Pentium4.

For now, all PMDs are counters, so just call get_impl_pmds().

Definition at line 630 of file pfmlib_pentium4.c.

{
    pentium4_get_impl_pmds(impl_counters);
}

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pentium4_get_impl_pmcs()

static void pentium4_get_impl_pmcs ( pfmlib_regmask_t *  impl_pmcs )

static

pentium4_get_impl_pmcs

Set the appropriate bit in the impl_pmcs bitmask for each PMC that's available on Pentium4.

FIXME: How can we detect when HyperThreading is enabled?

Definition at line 589 of file pfmlib_pentium4.c.

{
    unsigned int i;
 
    for(i = 0; i < PENTIUM4_NUM_PMCS; i++) {
        pfm_regmask_set(impl_pmcs, i);
    }
    /*
     * IQ_ESCR0, IQ_ESCR1 only available on model 1 and 2
     */
    if (p4_model > 2) {
        pfm_regmask_clr(impl_pmcs, 16);
        pfm_regmask_clr(impl_pmcs, 48);
    }
}

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pentium4_get_impl_pmds()

static void pentium4_get_impl_pmds ( pfmlib_regmask_t *  impl_pmds )

static

pentium4_get_impl_pmds

Set the appropriate bit in the impl_pmcs bitmask for each PMD that's available on Pentium4.

FIXME: How can we detect when HyperThreading is enabled?

Definition at line 613 of file pfmlib_pentium4.c.

{
    unsigned int i;
 
    for(i = 0; i < PENTIUM4_NUM_PMDS; i++) {
        pfm_regmask_set(impl_pmds, i);
    }
}

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pentium4_get_inst_retired()

static int pentium4_get_inst_retired ( pfmlib_event_t *  e )

static

Definition at line 699 of file pfmlib_pentium4.c.

{
    /*
     * some models do not implement INSTR_COMPLETED
     */
    if (p4_model != 3 && p4_model != 4 && p4_model != 6) {
        e->event = PENTIUM4_INST_RETIRED;
        e->num_masks = 2;
        e->unit_masks[0] = 0;
        e->unit_masks[1] = 1;
    } else {
        e->event = PME_INSTR_COMPLETED;
        e->num_masks = 1;
        e->unit_masks[0] = 0;
    }
    return PFMLIB_SUCCESS;
}

pentium4_get_num_event_masks()

static unsigned int pentium4_get_num_event_masks ( unsigned int  event )

static

pentium4_get_num_event_masks

Count the number of available event-masks for the specified event. All valid masks in pentium4_events[].event_masks are contiguous in the array and have a non-NULL name.

Definition at line 301 of file pfmlib_pentium4.c.

{
    unsigned int i = 0;
 
    while (pentium4_events[event].event_masks[i].name) {
        i++;
    }
    return i;
}

pentium4_pmu_detect()

static int pentium4_pmu_detect ( void  )

static

pentium4_pmu_detect

Determine whether the system we're running on is a Pentium4 (or other CPU that uses the same PMU).

Definition at line 544 of file pfmlib_pentium4.c.

{
    int ret, family;
    char buffer[128];
 
    ret = __pfm_getcpuinfo_attr("vendor_id", buffer, sizeof(buffer));
    if (ret == -1)
        return PFMLIB_ERR_NOTSUPP;
 
    if (strcmp(buffer, "GenuineIntel"))
        return PFMLIB_ERR_NOTSUPP;
 
    ret = __pfm_getcpuinfo_attr("cpu family", buffer, sizeof(buffer));
    if (ret == -1)
        return PFMLIB_ERR_NOTSUPP;
 
    family = atoi(buffer);
 
    ret = __pfm_getcpuinfo_attr("model", buffer, sizeof(buffer));
    if (ret == -1)
        return PFMLIB_ERR_NOTSUPP;
 
    /*
     * we use model to detect model 2 which has one more counter IQ_ESCR1
     */
    p4_model = atoi(buffer);
    if (family != 15)
        return PFMLIB_ERR_NOTSUPP;
    /*
     * IQ_ESCR0, IQ_ESCR1 only for model 1 and 2 
     */
    if (p4_model >2)
        pentium4_support.pmc_count -= 2;
 
    return family == 15 ? PFMLIB_SUCCESS : PFMLIB_ERR_NOTSUPP;
}

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Variable Documentation

p4_model

int p4_model

static

Definition at line 188 of file pfmlib_pentium4.c.

p4_pmc_regmap

p4_regmap_t p4_pmc_regmap[]

static

Definition at line 50 of file pfmlib_pentium4.c.

p4_pmd_regmap

p4_regmap_t p4_pmd_regmap[]

static

Initial value:

={
 P4_REGMAP(0x300, "BPU_CTR0"),
 P4_REGMAP(0x301, "BPU_CTR1"),
 P4_REGMAP(0x304, "MS_CTR0"),
 P4_REGMAP(0x305, "MS_CTR1"),
 P4_REGMAP(0x308, "FLAME_CTR0"),
 P4_REGMAP(0x309, "FLAME_CTR1"),
 P4_REGMAP(0x30c, "IQ_CTR0"),
 P4_REGMAP(0x30d, "IQ_CTR1"),
 P4_REGMAP(0x310, "IQ_CTR4"),
 P4_REGMAP(0x302, "BPU_CTR2"),
 P4_REGMAP(0x303, "BPU_CTR3"),
 P4_REGMAP(0x306, "MS_CTR2"),
 P4_REGMAP(0x307, "MS_CTR3"),
 P4_REGMAP(0x30a, "FLAME_CTR2"),
 P4_REGMAP(0x30b, "FLAME_CTR3"),
 P4_REGMAP(0x30d, "IQ_CTR2"),
 P4_REGMAP(0x30f, "IQ_CTR3"),
 P4_REGMAP(0x311, "IQ_CTR5"),
}

Definition at line 121 of file pfmlib_pentium4.c.

p4_replay_regs

pentium4_replay_regs_t p4_replay_regs[]

static

Definition at line 152 of file pfmlib_pentium4.c.

pentium4_support

pfm_pmu_support_t pentium4_support

Initial value:

= {
    .pmu_name       = "Pentium4/Xeon/EM64T",
    .pmu_type       = PFMLIB_PENTIUM4_PMU,
    .pme_count      = PENTIUM4_EVENT_COUNT,
    .pmd_count      = PENTIUM4_NUM_PMDS,
    .pmc_count      = PENTIUM4_NUM_PMCS,
    .num_cnt        = PENTIUM4_NUM_PMDS,
    .get_event_code     = pentium4_get_event_code,
    .get_event_name     = pentium4_get_event_name,
    .get_event_mask_name    = pentium4_get_event_mask_name,
    .get_event_counters = pentium4_get_event_counters,
    .get_num_event_masks    = pentium4_get_num_event_masks,
    .dispatch_events    = pentium4_dispatch_events,
    .pmu_detect     = pentium4_pmu_detect,
    .get_impl_pmcs      = pentium4_get_impl_pmcs,
    .get_impl_pmds      = pentium4_get_impl_pmds,
    .get_impl_counters  = pentium4_get_impl_counters,
    .get_hw_counter_width   = pentium4_get_hw_counter_width,
    .get_event_desc         = pentium4_get_event_desc,
    .get_event_mask_desc    = pentium4_get_event_mask_desc,
    .get_event_mask_code    = pentium4_get_event_mask_code,
    .get_cycle_event    = pentium4_get_cycle_event,
    .get_inst_retired_event = pentium4_get_inst_retired
}

pentium4_support

Definition at line 720 of file pfmlib_pentium4.c.