PAPI 7.1.0.0
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rocs.c
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1#include <string.h>
2#include <sys/stat.h>
3#include <dlfcn.h>
4#include <rocm_smi.h>
5#include <inttypes.h>
6#include "papi.h"
7#include "papi_memory.h"
8#include "rocs.h"
9#include "htable.h"
10
11unsigned int _rocm_smi_lock;
12
13static rsmi_status_t (*rsmi_num_monitor_dev_p)(uint32_t *);
14static rsmi_status_t (*rsmi_func_iter_value_get_p)(rsmi_func_id_iter_handle_t, rsmi_func_id_value_t *);
15static rsmi_status_t (*rsmi_func_iter_next_p)(rsmi_func_id_iter_handle_t);
16static rsmi_status_t (*rsmi_dev_supported_func_iterator_open_p)(uint32_t, rsmi_func_id_iter_handle_t *);
17static rsmi_status_t (*rsmi_dev_supported_func_iterator_close_p)(rsmi_func_id_iter_handle_t *);
18static rsmi_status_t (*rsmi_dev_supported_variant_iterator_open_p)(rsmi_func_id_iter_handle_t, rsmi_func_id_iter_handle_t *);
19static rsmi_status_t (*rsmi_dev_id_get_p)(uint32_t, uint16_t *);
20static rsmi_status_t (*rsmi_dev_unique_id_get_p)(uint32_t, uint64_t *);
21static rsmi_status_t (*rsmi_dev_brand_get_p)(uint32_t, char *, uint32_t);
22static rsmi_status_t (*rsmi_dev_name_get_p)(uint32_t, char *, size_t);
23static rsmi_status_t (*rsmi_dev_serial_number_get_p)(uint32_t, char *, uint32_t);
24static rsmi_status_t (*rsmi_dev_vbios_version_get_p)(uint32_t, char *, uint32_t);
25static rsmi_status_t (*rsmi_dev_vendor_name_get_p)(uint32_t, char *, size_t);
26static rsmi_status_t (*rsmi_dev_vendor_id_get_p)(uint32_t, uint16_t *);
27static rsmi_status_t (*rsmi_dev_subsystem_id_get_p)(uint32_t, uint16_t *);
28static rsmi_status_t (*rsmi_dev_subsystem_vendor_id_get_p)(uint32_t, uint16_t *);
29static rsmi_status_t (*rsmi_dev_subsystem_name_get_p)(uint32_t, char *, size_t);
30static rsmi_status_t (*rsmi_dev_drm_render_minor_get_p)(uint32_t, uint32_t *);
31static rsmi_status_t (*rsmi_dev_overdrive_level_get_p)(uint32_t, uint32_t *);
32static rsmi_status_t (*rsmi_dev_overdrive_level_set_p)(uint32_t, uint32_t);
33static rsmi_status_t (*rsmi_dev_memory_busy_percent_get_p)(uint32_t, uint32_t *);
34static rsmi_status_t (*rsmi_dev_memory_reserved_pages_get_p)(uint32_t, uint32_t *, rsmi_retired_page_record_t *);
35static rsmi_status_t (*rsmi_dev_memory_total_get_p)(uint32_t, rsmi_memory_type_t, uint64_t *);
36static rsmi_status_t (*rsmi_dev_memory_usage_get_p)(uint32_t, rsmi_memory_type_t, uint64_t *);
37static rsmi_status_t (*rsmi_dev_perf_level_get_p)(uint32_t, rsmi_dev_perf_level_t *);
38static rsmi_status_t (*rsmi_dev_perf_level_set_p)(int32_t, rsmi_dev_perf_level_t);
39static rsmi_status_t (*rsmi_dev_busy_percent_get_p)(uint32_t, uint32_t *);
40static rsmi_status_t (*rsmi_dev_firmware_version_get_p)(uint32_t, rsmi_fw_block_t, uint64_t *);
41static rsmi_status_t (*rsmi_dev_ecc_count_get_p)(uint32_t, rsmi_gpu_block_t, rsmi_error_count_t *);
42static rsmi_status_t (*rsmi_dev_ecc_enabled_get_p)(uint32_t, uint64_t *);
43static rsmi_status_t (*rsmi_dev_ecc_status_get_p)(uint32_t, rsmi_gpu_block_t, rsmi_ras_err_state_t *);
44static rsmi_status_t (*rsmi_dev_fan_reset_p)(uint32_t, uint32_t);
45static rsmi_status_t (*rsmi_dev_fan_rpms_get_p)(uint32_t, uint32_t, int64_t *);
46static rsmi_status_t (*rsmi_dev_fan_speed_get_p)(uint32_t, uint32_t, int64_t *);
47static rsmi_status_t (*rsmi_dev_fan_speed_max_get_p)(uint32_t, uint32_t, uint64_t *);
48static rsmi_status_t (*rsmi_dev_fan_speed_set_p)(uint32_t, uint32_t, uint64_t);
49static rsmi_status_t (*rsmi_dev_power_avg_get_p)(uint32_t, uint32_t, uint64_t *);
50static rsmi_status_t (*rsmi_dev_power_cap_get_p)(uint32_t, uint32_t, uint64_t *);
51static rsmi_status_t (*rsmi_dev_power_cap_set_p)(uint32_t, uint32_t, uint64_t);
52static rsmi_status_t (*rsmi_dev_power_cap_range_get_p)(uint32_t, uint32_t, uint64_t *, uint64_t *);
53static rsmi_status_t (*rsmi_dev_power_profile_presets_get_p)(uint32_t, uint32_t, rsmi_power_profile_status_t *);
54static rsmi_status_t (*rsmi_dev_power_profile_set_p)(uint32_t, uint32_t, rsmi_power_profile_preset_masks_t);
55static rsmi_status_t (*rsmi_dev_temp_metric_get_p)(uint32_t, uint32_t, rsmi_temperature_metric_t, int64_t *);
56static rsmi_status_t (*rsmi_dev_pci_id_get_p)(uint32_t, uint64_t *);
57static rsmi_status_t (*rsmi_dev_pci_throughput_get_p)(uint32_t, uint64_t *, uint64_t *, uint64_t *);
58static rsmi_status_t (*rsmi_dev_pci_replay_counter_get_p)(uint32_t, uint64_t *);
59static rsmi_status_t (*rsmi_dev_pci_bandwidth_get_p)(uint32_t, rsmi_pcie_bandwidth_t *);
60static rsmi_status_t (*rsmi_dev_pci_bandwidth_set_p)(uint32_t, uint64_t);
61static rsmi_status_t (*rsmi_dev_gpu_clk_freq_get_p)(uint32_t, rsmi_clk_type_t, rsmi_frequencies_t *);
62static rsmi_status_t (*rsmi_dev_gpu_clk_freq_set_p)(uint32_t, rsmi_clk_type_t, uint64_t);
63static rsmi_status_t (*rsmi_dev_od_volt_curve_regions_get_p)(uint32_t, uint32_t *, rsmi_freq_volt_region_t *);
64static rsmi_status_t (*rsmi_dev_od_volt_info_get_p)(uint32_t, rsmi_od_volt_freq_data_t *);
65static rsmi_status_t (*rsmi_init_p)(uint64_t);
66static rsmi_status_t (*rsmi_shut_down_p)(void);
67static rsmi_status_t (*rsmi_version_get_p)(rsmi_version_t *);
68static rsmi_status_t (*rsmi_version_str_get_p)(rsmi_sw_component_t, char *, size_t);
69static rsmi_status_t (*rsmi_status_string_p)(rsmi_status_t, const char **);
70static rsmi_status_t (*rsmi_dev_counter_group_supported_p)(uint32_t, rsmi_event_group_t);
71static rsmi_status_t (*rsmi_dev_counter_create_p)(uint32_t, rsmi_event_type_t, rsmi_event_handle_t *);
72static rsmi_status_t (*rsmi_dev_counter_destroy_p)(rsmi_event_handle_t);
73static rsmi_status_t (*rsmi_counter_control_p)(rsmi_event_handle_t, rsmi_counter_command_t, void *);
74static rsmi_status_t (*rsmi_counter_read_p)(rsmi_event_type_t, rsmi_counter_value_t *);
75static rsmi_status_t (*rsmi_counter_available_counters_get_p)(uint32_t, rsmi_event_group_t, uint32_t *);
76static rsmi_status_t (*rsmi_is_P2P_accessible_p)(uint32_t, uint32_t, int *);
77static rsmi_status_t (*rsmi_minmax_bandwidth_get_p)(uint32_t, uint32_t, uint64_t *, uint64_t *);
78
79/*
80 * rocs defined variant and subvariant
81 *
82 * Given a rsmi function (e.g. rsmi_dev_pci_bandwidth_get) variants
83 * and subvariant allow for accounting additional events associated
84 * to it (e.g. ROCS_PCI_BW_VARIANT__COUNT)
85 *
86 */
87typedef enum {
88 ROCS_ACCESS_MODE__READ = 1,
89 ROCS_ACCESS_MODE__WRITE,
90 ROCS_ACCESS_MODE__RDWR,
91} rocs_access_mode_e;
92
93typedef enum {
94 ROCS_PCI_THROUGHPUT_VARIANT__SENT,
95 ROCS_PCI_THROUGHPUT_VARIANT__RECEIVED,
96 ROCS_PCI_THROUGHPUT_VARIANT__MAX_PACKET_SIZE,
97 ROCS_PCI_THROUGHPUT_VARIANT__NUM,
98} rocs_pci_throughput_variant_e;
99
100typedef enum {
101 ROCS_POWER_PRESETS_VARIANT__COUNT,
102 ROCS_POWER_PRESETS_VARIANT__AVAIL_PROFILES,
103 ROCS_POWER_PRESETS_VARIANT__CURRENT,
104 ROCS_POWER_PRESETS_VARIANT__NUM,
105} rocs_power_presets_variant_e;
106
107typedef enum {
108 ROCS_POWER_CAP_RANGE_VARIANT__MIN,
109 ROCS_POWER_CAP_RANGE_VARIANT__MAX,
110 ROCS_POWER_CAP_RANGE_VARIANT__NUM,
111} rocs_power_cap_range_variant_e;
112
113typedef enum {
114 ROCS_ECC_COUNT_SUBVARIANT__CORRECTABLE,
115 ROCS_ECC_COUNT_SUBVARIANT__UNCORRECTABLE,
116 ROCS_ECC_COUNT_SUBVARIANT__NUM,
117} rocs_ecc_count_subvariant_e;
118
119typedef enum {
120 ROCS_GPU_CLK_FREQ_VARIANT__SYSTEM = RSMI_CLK_TYPE_SYS,
121 ROCS_GPU_CLK_FREQ_VARIANT__DATA_FABRIC = RSMI_CLK_TYPE_DF,
122 ROCS_GPU_CLK_FREQ_VARIANT__DISPLAY_ENGINE = RSMI_CLK_TYPE_DCEF,
123 ROCS_GPU_CLK_FREQ_VARIANT__SOC = RSMI_CLK_TYPE_SOC,
124 ROCS_GPU_CLK_FREQ_VARIANT__MEMORY = RSMI_CLK_TYPE_MEM,
125 ROCS_GPU_CLK_FREQ_VARIANT__NUM,
126} rocs_gpu_clk_freq_variant_e;
127
128typedef enum {
129 ROCS_GPU_CLK_FREQ_SUBVARIANT__COUNT,
130 ROCS_GPU_CLK_FREQ_SUBVARIANT__CURRENT,
131 ROCS_GPU_CLK_FREQ_SUBVARIANT__NUM,
132} rocs_gpu_clk_freq_subvariant_e;
133
134typedef enum {
135 ROCS_PCI_BW_VARIANT__COUNT,
136 ROCS_PCI_BW_VARIANT__CURRENT,
137 ROCS_PCI_BW_VARIANT__RATE_IDX,
138 ROCS_PCI_BW_VARIANT__LANE_IDX,
139 ROCS_PCI_BW_VARIANT__NUM,
140} rocs_pci_bw_variant_e;
141
142typedef enum {
143 /* XXX: the following events (variants) and the corresponding logic
144 are not tested */
145 ROCS_XGMI_VARIANT__MI50_0_NOP_TX = RSMI_EVNT_XGMI_0_NOP_TX,
146 ROCS_XGMI_VARIANT__MI50_0_REQUEST_TX = RSMI_EVNT_XGMI_0_REQUEST_TX,
147 ROCS_XGMI_VARIANT__MI50_0_RESPONSE_TX = RSMI_EVNT_XGMI_0_RESPONSE_TX,
148 ROCS_XGMI_VARIANT__MI50_0_BEATS_TX = RSMI_EVNT_XGMI_0_BEATS_TX,
149 ROCS_XGMI_VARIANT__MI50_1_NOP_TX = RSMI_EVNT_XGMI_1_NOP_TX,
150 ROCS_XGMI_VARIANT__MI50_1_REQUEST_TX = RSMI_EVNT_XGMI_1_REQUEST_TX,
151 ROCS_XGMI_VARIANT__MI50_1_RESPONSE_TX = RSMI_EVNT_XGMI_1_RESPONSE_TX,
152 ROCS_XGMI_VARIANT__MI50_1_BEATS_TX = RSMI_EVNT_XGMI_1_BEATS_TX,
153 ROCS_XGMI_VARIANT__MI100_DATA_OUT_0 = RSMI_EVNT_XGMI_DATA_OUT_0,
154 ROCS_XGMI_VARIANT__MI100_DATA_OUT_1 = RSMI_EVNT_XGMI_DATA_OUT_1,
155 ROCS_XGMI_VARIANT__MI100_DATA_OUT_2 = RSMI_EVNT_XGMI_DATA_OUT_2,
156 ROCS_XGMI_VARIANT__MI100_DATA_OUT_3 = RSMI_EVNT_XGMI_DATA_OUT_3,
157 ROCS_XGMI_VARIANT__MI100_DATA_OUT_4 = RSMI_EVNT_XGMI_DATA_OUT_4,
158 ROCS_XGMI_VARIANT__MI100_DATA_OUT_5 = RSMI_EVNT_XGMI_DATA_OUT_5,
159} rocs_xgmi_variant_e;
160
161typedef enum {
162 ROCS_XGMI_BW_VARIANT__MIN,
163 ROCS_XGMI_BW_VARIANT__MAX,
164 ROCS_XGMI_BW_VARIANT__NUM,
165} rocs_xgmi_bw_variant_e;
166
167static int open_simple(void *);
168static int close_simple(void *);
169static int start_simple(void *);
170static int stop_simple(void *);
171static int open_xgmi_evt(void *);
172static int close_xgmi_evt(void *);
173static int start_xgmi_evt(void *);
174static int stop_xgmi_evt(void *);
175static int access_xgmi_evt(rocs_access_mode_e, void *);
176static int access_xgmi_bw(rocs_access_mode_e, void *);
177static int access_rsmi_dev_count(rocs_access_mode_e, void *);
178static int access_rsmi_lib_version(rocs_access_mode_e, void *);
179static int access_rsmi_dev_driver_version_str(rocs_access_mode_e, void *);
180static int access_rsmi_dev_id(rocs_access_mode_e, void *);
181static int access_rsmi_dev_subsystem_vendor_id(rocs_access_mode_e, void *);
182static int access_rsmi_dev_vendor_id(rocs_access_mode_e, void *);
183static int access_rsmi_dev_unique_id(rocs_access_mode_e, void *);
184static int access_rsmi_dev_subsystem_id(rocs_access_mode_e, void *);
185static int access_rsmi_dev_drm_render_minor(rocs_access_mode_e, void *);
186static int access_rsmi_dev_overdrive_level(rocs_access_mode_e, void *);
187static int access_rsmi_dev_perf_level(rocs_access_mode_e, void *);
188static int access_rsmi_dev_memory_total(rocs_access_mode_e, void *);
189static int access_rsmi_dev_memory_usage(rocs_access_mode_e, void *);
190static int access_rsmi_dev_memory_busy_percent(rocs_access_mode_e, void *);
191static int access_rsmi_dev_busy_percent(rocs_access_mode_e, void *);
192static int access_rsmi_dev_pci_id(rocs_access_mode_e, void *);
193static int access_rsmi_dev_pci_replay_counter(rocs_access_mode_e, void *);
194static int access_rsmi_dev_pci_throughput(rocs_access_mode_e, void *);
195static int access_rsmi_dev_power_profile_presets(rocs_access_mode_e, void *);
196static int access_rsmi_dev_power_profile_set(rocs_access_mode_e, void *);
197static int access_rsmi_dev_fan_reset(rocs_access_mode_e, void *);
198static int access_rsmi_dev_fan_rpms(rocs_access_mode_e, void *);
199static int access_rsmi_dev_fan_speed_max(rocs_access_mode_e, void *);
200static int access_rsmi_dev_fan_speed(rocs_access_mode_e, void *);
201static int access_rsmi_dev_power_ave(rocs_access_mode_e, void *);
202static int access_rsmi_dev_power_cap(rocs_access_mode_e, void *);
203static int access_rsmi_dev_power_cap_range(rocs_access_mode_e, void *);
204static int access_rsmi_dev_temp_metric(rocs_access_mode_e, void *);
205static int access_rsmi_dev_firmware_version(rocs_access_mode_e, void *);
206static int access_rsmi_dev_ecc_count(rocs_access_mode_e, void *);
207static int access_rsmi_dev_ecc_enabled(rocs_access_mode_e, void *);
208static int access_rsmi_dev_ecc_status(rocs_access_mode_e, void *);
209static int access_rsmi_dev_gpu_clk_freq(rocs_access_mode_e, void *);
210static int access_rsmi_dev_pci_bandwidth(rocs_access_mode_e, void *);
211static int access_rsmi_dev_brand(rocs_access_mode_e, void *);
212static int access_rsmi_dev_name(rocs_access_mode_e, void *);
213static int access_rsmi_dev_serial_number(rocs_access_mode_e, void *);
214static int access_rsmi_dev_subsystem_name(rocs_access_mode_e, void *);
215static int access_rsmi_dev_vbios_version(rocs_access_mode_e, void *);
216static int access_rsmi_dev_vendor_name(rocs_access_mode_e, void *);
217
218typedef int (*open_function_f)(void *arg);
219typedef int (*close_function_f)(void *arg);
220typedef int (*start_function_f)(void *arg);
221typedef int (*stop_function_f)(void *arg);
222typedef int (*access_function_f)(rocs_access_mode_e mode, void *arg);
223
224struct {
225 const char *name;
226 open_function_f open_func_p;
227 close_function_f close_func_p;
228 start_function_f start_func_p;
229 stop_function_f stop_func_p;
230 access_function_f access_func_p;
231} event_function_table[] = {
232 {"rsmi_dev_count", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_count},
233 {"rsmi_lib_version", open_simple, close_simple, start_simple, stop_simple, access_rsmi_lib_version},
234 {"rsmi_dev_driver_version_str_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_driver_version_str},
235 {"rsmi_dev_id_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_id},
236 {"rsmi_dev_subsystem_vendor_id_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_subsystem_vendor_id},
237 {"rsmi_dev_vendor_id_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_vendor_id},
238 {"rsmi_dev_unique_id_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_unique_id},
239 {"rsmi_dev_subsystem_id_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_subsystem_id},
240 {"rsmi_dev_drm_render_minor_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_drm_render_minor},
241 {"rsmi_dev_overdrive_level_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_overdrive_level},
242 {"rsmi_dev_overdrive_level_set", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_overdrive_level},
243 {"rsmi_dev_perf_level_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_perf_level},
244 {"rsmi_dev_perf_level_set", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_perf_level},
245 {"rsmi_dev_memory_total_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_memory_total},
246 {"rsmi_dev_memory_usage_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_memory_usage},
247 {"rsmi_dev_memory_busy_percent_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_memory_busy_percent},
248 {"rsmi_dev_busy_percent_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_busy_percent},
249 {"rsmi_dev_pci_id_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_pci_id},
250 {"rsmi_dev_pci_replay_counter_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_pci_replay_counter},
251 {"rsmi_dev_pci_throughput_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_pci_throughput},
252 {"rsmi_dev_power_profile_presets_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_power_profile_presets},
253 {"rsmi_dev_power_profile_set", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_power_profile_set},
254 {"rsmi_dev_fan_reset", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_fan_reset},
255 {"rsmi_dev_fan_rpms_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_fan_rpms},
256 {"rsmi_dev_fan_speed_max_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_fan_speed_max},
257 {"rsmi_dev_fan_speed_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_fan_speed},
258 {"rsmi_dev_fan_speed_set", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_fan_speed},
259 {"rsmi_dev_power_ave_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_power_ave},
260 {"rsmi_dev_power_cap_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_power_cap},
261 {"rsmi_dev_power_cap_set", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_power_cap},
262 {"rsmi_dev_power_cap_range_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_power_cap_range},
263 {"rsmi_dev_temp_metric_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_temp_metric},
264 {"rsmi_dev_firmware_version_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_firmware_version},
265 {"rsmi_dev_ecc_count_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_ecc_count},
266 {"rsmi_dev_ecc_enabled_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_ecc_enabled},
267 {"rsmi_dev_ecc_status_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_ecc_status},
268 {"rsmi_dev_gpu_clk_freq_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_gpu_clk_freq},
269 {"rsmi_dev_gpu_clk_freq_set", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_gpu_clk_freq},
270 {"rsmi_dev_pci_bandwidth_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_pci_bandwidth},
271 {"rsmi_dev_pci_bandwidth_set", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_pci_bandwidth},
272 {"rsmi_dev_brand_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_brand},
273 {"rsmi_dev_name_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_name},
274 {"rsmi_dev_serial_number_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_serial_number},
275 {"rsmi_dev_subsystem_name_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_subsystem_name},
276 {"rsmi_dev_vbios_version_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_vbios_version},
277 {"rsmi_dev_vendor_name_get", open_simple, close_simple, start_simple, stop_simple, access_rsmi_dev_vendor_name},
278 {"rsmi_dev_xgmi_evt_get", open_xgmi_evt, close_xgmi_evt, start_xgmi_evt, stop_xgmi_evt, access_xgmi_evt},
279 {"rsmi_dev_xgmi_bw_get", open_simple, close_simple, start_simple, stop_simple, access_xgmi_bw},
280 {NULL, NULL, NULL, NULL, NULL, NULL}
281};
282
283typedef struct {
284 unsigned int id;
285 char *name;
286 char *descr;
287 int32_t device;
288 int64_t variant;
289 int64_t subvariant;
290 int64_t value;
291 char scratch[PAPI_MAX_STR_LEN];
292 rocs_access_mode_e mode;
293 open_function_f open_func_p;
294 close_function_f close_func_p;
295 start_function_f start_func_p;
296 stop_function_f stop_func_p;
297 access_function_f access_func_p;
298} ntv_event_t;
299
300typedef struct ntv_event_table {
301 ntv_event_t *events;
302 int count;
303} ntv_event_table_t;
304
305struct rocs_ctx {
306 int state;
307 unsigned int *events_id;
308 int num_events;
309 int64_t *counters;
310 int32_t device_mask;
311};
312
313#define PAPI_ROCMSMI_MAX_DEV_COUNT (32)
314#define PAPI_ROCMSMI_MAX_SUBVAR (32)
315
316static int load_rsmi_sym(void);
317static int unload_rsmi_sym(void);
318static int init_event_table(void);
319static int shutdown_event_table(void);
320static int init_device_table(void);
321static int shutdown_device_table(void);
322
323static void *rsmi_dlp;
324static ntv_event_table_t ntv_table;
325static ntv_event_table_t *ntv_table_p;
326static void *htable;
327static char error_string[PAPI_MAX_STR_LEN + 1];
328static int32_t device_count;
329static rsmi_frequencies_t *freq_table;
330static rsmi_pcie_bandwidth_t *pcie_table;
331
332int
333rocs_init(void)
334{
335 int papi_errno;
336
337 papi_errno = load_rsmi_sym();
338 if (papi_errno != PAPI_OK) {
339 return papi_errno;
340 }
341
342 rsmi_status_t status = rsmi_init_p(0);
343 if (status != RSMI_STATUS_SUCCESS) {
344 const char *status_string = NULL;
345 rsmi_status_string_p(status, &status_string);
346 strcpy(error_string, status_string);
347 return PAPI_EMISC;
348 }
349
350 htable_init(&htable);
351
352 status = rsmi_num_monitor_dev_p((uint32_t *)&device_count);
353 if (status != RSMI_STATUS_SUCCESS) {
354 sprintf(error_string, "Error while counting available devices.");
355 papi_errno = PAPI_EMISC;
356 goto fn_fail;
357 }
358
359 papi_errno = init_device_table();
360 if (papi_errno != PAPI_OK) {
361 sprintf(error_string, "Error while initializing device tables.");
362 goto fn_fail;
363 }
364
365 papi_errno = init_event_table();
366 if (papi_errno != PAPI_OK) {
367 sprintf(error_string, "Error while initializing the native event table.");
368 goto fn_fail;
369 }
370
371 ntv_table_p = &ntv_table;
372
373 fn_exit:
374 return papi_errno;
375 fn_fail:
376 shutdown_event_table();
377 shutdown_device_table();
378 htable_shutdown(htable);
379 rsmi_shut_down_p();
380 goto fn_exit;
381}
382
383int
384rocs_evt_enum(unsigned int *event_code, int modifier)
385{
386 int papi_errno = PAPI_OK;
387
388 switch(modifier) {
389 case PAPI_ENUM_FIRST:
390 if (ntv_table_p->count == 0) {
391 papi_errno = PAPI_ENOEVNT;
392 }
393 *event_code = 0;
394 break;
395 case PAPI_ENUM_EVENTS:
396 if (*event_code + 1 < (unsigned int) ntv_table_p->count) {
397 ++(*event_code);
398 } else {
399 papi_errno = PAPI_END;
400 }
401 break;
402 default:
403 papi_errno = PAPI_EINVAL;
404 }
405
406 return papi_errno;
407}
408
409int
410rocs_evt_code_to_descr(unsigned int event_code, char *descr, int len)
411{
412 if (event_code >= (unsigned int) ntv_table_p->count) {
413 return PAPI_EINVAL;
414 }
415 /* FIXME: make sure descr is not longer than len */
416 strncpy(descr, ntv_table_p->events[event_code].descr, len);
417 return PAPI_OK;
418}
419
420int
421rocs_evt_name_to_code(const char *name, unsigned int *event_code)
422{
423 int papi_errno = PAPI_OK;
424 int htable_errno;
425
426 ntv_event_t *event;
427 htable_errno = htable_find(htable, name, (void **) &event);
428 if (htable_errno != HTABLE_SUCCESS) {
429 papi_errno = (htable_errno == HTABLE_ENOVAL) ?
430 PAPI_ENOEVNT : PAPI_ECMP;
431 goto fn_exit;
432 }
433 *event_code = event->id;
434
435 fn_exit:
436 return papi_errno;
437}
438
439int
440rocs_evt_code_to_name(unsigned int event_code, char *name, int len)
441{
442 if (event_code >= (unsigned int) ntv_table_p->count) {
443 return PAPI_EINVAL;
444 }
445 strncpy(name, ntv_table_p->events[event_code].name, len);
446 return PAPI_OK;
447}
448
449int
450rocs_err_get_last(const char **err_string)
451{
452 *err_string = error_string;
453 return PAPI_OK;
454}
455
456static int32_t device_mask;
457static int acquire_devices(unsigned int *, int, int32_t *);
458static int release_devices(int32_t *);
459
460int
461rocs_ctx_open(unsigned int *events_id, int num_events, rocs_ctx_t *rocs_ctx)
462{
463 int papi_errno = PAPI_OK;
464 int64_t *counters = NULL;
465 int i = 0, j;
466
467 _papi_hwi_lock(_rocm_smi_lock);
468
469 int32_t bitmask;
470 if (acquire_devices(events_id, num_events, &bitmask) != PAPI_OK) {
471 papi_errno = PAPI_ECNFLCT;
472 goto fn_fail;
473 }
474
475 (*rocs_ctx) = papi_calloc(1, sizeof(struct rocs_ctx));
476 if ((*rocs_ctx) == NULL) {
477 papi_errno = PAPI_ENOMEM;
478 goto fn_fail;
479 }
480
481 counters = papi_calloc(num_events, sizeof(int64_t));
482 if (counters == NULL) {
483 papi_errno = PAPI_ENOMEM;
484 goto fn_fail;
485 }
486
487 for (i = 0; i < num_events; ++i) {
488 int id = events_id[i];
489 papi_errno = ntv_table_p->events[id].open_func_p(&ntv_table_p->events[id]);
490 if (papi_errno != PAPI_OK) {
491 goto fn_fail;
492 }
493 }
494
495 (*rocs_ctx)->state |= ROCS_EVENTS_OPENED;
496 (*rocs_ctx)->events_id = events_id;
497 (*rocs_ctx)->num_events = num_events;
498 (*rocs_ctx)->counters = counters;
499 (*rocs_ctx)->device_mask = bitmask;
500
501 fn_exit:
502 _papi_hwi_unlock(_rocm_smi_lock);
503 return papi_errno;
504 fn_fail:
505 for (j = 0; j < i; ++j) {
506 int id = events_id[j];
507 ntv_table_p->events[id].close_func_p(&ntv_table_p->events[id]);
508 }
509 if (counters) {
510 papi_free(counters);
511 }
512 if (*rocs_ctx) {
513 papi_free(*rocs_ctx);
514 }
515 goto fn_exit;
516}
517
518int
519rocs_ctx_close(rocs_ctx_t rocs_ctx)
520{
521 int papi_errno = PAPI_OK;
522
523 _papi_hwi_lock(_rocm_smi_lock);
524
525 int i;
526 for (i = 0; i < rocs_ctx->num_events; ++i) {
527 int id = rocs_ctx->events_id[i];
528 papi_errno = ntv_table_p->events[id].close_func_p(&ntv_table_p->events[id]);
529 if (papi_errno != PAPI_OK) {
530 goto fn_fail;
531 }
532 }
533
534 release_devices(&rocs_ctx->device_mask);
535 papi_free(rocs_ctx->counters);
536 papi_free(rocs_ctx);
537
538 fn_exit:
539 _papi_hwi_unlock(_rocm_smi_lock);
540 return papi_errno;
541 fn_fail:
542 goto fn_exit;
543}
544
545int
546rocs_ctx_start(rocs_ctx_t rocs_ctx)
547{
548 int papi_errno = PAPI_OK;
549
550 if (!(rocs_ctx->state & ROCS_EVENTS_OPENED)) {
551 return PAPI_ECMP;
552 }
553
554 if (rocs_ctx->state & ROCS_EVENTS_RUNNING) {
555 return PAPI_ECMP;
556 }
557
558 int i, j;
559 for (i = 0; i < rocs_ctx->num_events; ++i) {
560 int id = rocs_ctx->events_id[i];
561 papi_errno = ntv_table_p->events[id].start_func_p(&ntv_table_p->events[id]);
562 if (papi_errno != PAPI_OK) {
563 goto fn_fail;
564 }
565 }
566
567 rocs_ctx->state |= ROCS_EVENTS_RUNNING;
568
569 fn_exit:
570 return papi_errno;
571 fn_fail:
572 for (j = 0; j < i; ++j) {
573 int id = rocs_ctx->events_id[i];
574 ntv_table_p->events[id].stop_func_p(&ntv_table_p->events[id]);
575 }
576 goto fn_exit;
577}
578
579int
580rocs_ctx_stop(rocs_ctx_t rocs_ctx)
581{
582 if (!(rocs_ctx->state & ROCS_EVENTS_OPENED)) {
583 return PAPI_ECMP;
584 }
585
586 if (!(rocs_ctx->state & ROCS_EVENTS_RUNNING)) {
587 return PAPI_ECMP;
588 }
589
590 int i;
591 for (i = 0; i < rocs_ctx->num_events; ++i) {
592 int id = rocs_ctx->events_id[i];
593 int papi_errno = ntv_table_p->events[id].stop_func_p(&ntv_table_p->events[id]);
594 if (papi_errno != PAPI_OK) {
595 return papi_errno;
596 }
597 }
598
599 rocs_ctx->state &= ~ROCS_EVENTS_RUNNING;
600
601 return PAPI_OK;
602}
603
604int
605rocs_ctx_read(rocs_ctx_t rocs_ctx, long long **counts)
606{
607 int papi_errno = PAPI_OK;
608
609 int i;
610 for (i = 0; i < rocs_ctx->num_events; ++i) {
611 int id = rocs_ctx->events_id[i];
612 papi_errno = ntv_table_p->events[id].access_func_p(ROCS_ACCESS_MODE__READ, &ntv_table_p->events[id]);
613 if (papi_errno != PAPI_OK) {
614 return papi_errno;
615 }
616 rocs_ctx->counters[i] = ntv_table_p->events[id].value;
617 }
618 *counts = (long long *) rocs_ctx->counters;
619
620 return papi_errno;
621}
622
623int
624rocs_ctx_write(rocs_ctx_t rocs_ctx, long long *counts)
625{
626 int papi_errno = PAPI_OK;
627
628 int i;
629 for (i = 0; i < rocs_ctx->num_events; ++i) {
630 int id = rocs_ctx->events_id[i];
631 ntv_table_p->events[id].value = counts[i];
632 papi_errno = ntv_table_p->events[id].access_func_p(ROCS_ACCESS_MODE__WRITE, &ntv_table_p->events[id]);
633 if (papi_errno != PAPI_OK) {
634 return papi_errno;
635 }
636 }
637
638 return papi_errno;
639}
640
641int
642rocs_ctx_reset(rocs_ctx_t rocs_ctx)
643{
644 int i;
645 for (i = 0; i < rocs_ctx->num_events; ++i) {
646 int id = rocs_ctx->events_id[i];
647 ntv_table_p->events[id].value = 0;
648 rocs_ctx->counters[i] = 0;
649 }
650
651 return PAPI_OK;
652}
653
654int
655rocs_shutdown(void)
656{
657 shutdown_device_table();
658 shutdown_event_table();
659 htable_shutdown(htable);
660 rsmi_shut_down_p();
661 return unload_rsmi_sym();
662}
663
664int
665load_rsmi_sym(void)
666{
667 int papi_errno = PAPI_OK;
668
669 char pathname[PATH_MAX] = { 0 };
670 char *rocmsmi_root = getenv("PAPI_ROCMSMI_ROOT");
671 if (rocmsmi_root == NULL) {
672 sprintf(error_string, "Can't load librocm_smi64.so, PAPI_ROCMSMI_ROOT not set.");
673 goto fn_fail;
674 }
675
676 sprintf(pathname, "%s/lib/librocm_smi64.so", rocmsmi_root);
677
678 rsmi_dlp = dlopen(pathname, RTLD_NOW | RTLD_GLOBAL);
679 if (rsmi_dlp == NULL) {
680 sprintf(error_string, "%s", dlerror());
681 goto fn_fail;
682 }
683
684 rsmi_num_monitor_dev_p = dlsym(rsmi_dlp, "rsmi_num_monitor_devices");
685 rsmi_func_iter_value_get_p = dlsym(rsmi_dlp, "rsmi_func_iter_value_get");
686 rsmi_func_iter_next_p = dlsym(rsmi_dlp, "rsmi_func_iter_next");
687 rsmi_dev_supported_func_iterator_open_p = dlsym(rsmi_dlp, "rsmi_dev_supported_func_iterator_open");
688 rsmi_dev_supported_func_iterator_close_p = dlsym(rsmi_dlp, "rsmi_dev_supported_func_iterator_close");
689 rsmi_dev_supported_variant_iterator_open_p = dlsym(rsmi_dlp, "rsmi_dev_supported_variant_iterator_open");
690 rsmi_dev_id_get_p = dlsym(rsmi_dlp, "rsmi_dev_id_get");
691 rsmi_dev_unique_id_get_p = dlsym(rsmi_dlp, "rsmi_dev_unique_id_get");
692 rsmi_dev_brand_get_p = dlsym(rsmi_dlp, "rsmi_dev_brand_get");
693 rsmi_dev_name_get_p = dlsym(rsmi_dlp, "rsmi_dev_name_get");
694 rsmi_dev_serial_number_get_p = dlsym(rsmi_dlp, "rsmi_dev_serial_number_get");
695 rsmi_dev_vbios_version_get_p = dlsym(rsmi_dlp, "rsmi_dev_vbios_version_get");
696 rsmi_dev_vendor_name_get_p = dlsym(rsmi_dlp, "rsmi_dev_vendor_name_get");
697 rsmi_dev_vendor_id_get_p = dlsym(rsmi_dlp, "rsmi_dev_vendor_id_get");
698 rsmi_dev_subsystem_id_get_p = dlsym(rsmi_dlp, "rsmi_dev_subsystem_id_get");
699 rsmi_dev_subsystem_vendor_id_get_p = dlsym(rsmi_dlp, "rsmi_dev_subsystem_vendor_id_get");
700 rsmi_dev_subsystem_name_get_p = dlsym(rsmi_dlp, "rsmi_dev_subsystem_name_get");
701 rsmi_dev_drm_render_minor_get_p = dlsym(rsmi_dlp, "rsmi_dev_drm_render_minor_get");
702 rsmi_dev_overdrive_level_get_p = dlsym(rsmi_dlp, "rsmi_dev_overdrive_level_get");
703 rsmi_dev_overdrive_level_set_p = dlsym(rsmi_dlp, "rsmi_dev_overdrive_level_set");
704 rsmi_dev_memory_busy_percent_get_p = dlsym(rsmi_dlp, "rsmi_dev_memory_busy_percent_get");
705 rsmi_dev_memory_reserved_pages_get_p = dlsym(rsmi_dlp, "rsmi_dev_memory_reserved_pages_get");
706 rsmi_dev_memory_total_get_p = dlsym(rsmi_dlp, "rsmi_dev_memory_total_get");
707 rsmi_dev_memory_usage_get_p = dlsym(rsmi_dlp, "rsmi_dev_memory_usage_get");
708 rsmi_dev_perf_level_get_p = dlsym(rsmi_dlp, "rsmi_dev_perf_level_get");
709 rsmi_dev_perf_level_set_p = dlsym(rsmi_dlp, "rsmi_dev_perf_level_set");
710 rsmi_dev_busy_percent_get_p = dlsym(rsmi_dlp, "rsmi_dev_busy_percent_get");
711 rsmi_dev_firmware_version_get_p = dlsym(rsmi_dlp, "rsmi_dev_firmware_version_get");
712 rsmi_dev_ecc_count_get_p = dlsym(rsmi_dlp, "rsmi_dev_ecc_count_get");
713 rsmi_dev_ecc_enabled_get_p = dlsym(rsmi_dlp, "rsmi_dev_ecc_enabled_get");
714 rsmi_dev_ecc_status_get_p = dlsym(rsmi_dlp, "rsmi_dev_ecc_status_get");
715 rsmi_dev_fan_reset_p = dlsym(rsmi_dlp, "rsmi_dev_fan_reset");
716 rsmi_dev_fan_rpms_get_p = dlsym(rsmi_dlp, "rsmi_dev_fan_rpms_get");
717 rsmi_dev_fan_speed_get_p = dlsym(rsmi_dlp, "rsmi_dev_fan_speed_get");
718 rsmi_dev_fan_speed_max_get_p = dlsym(rsmi_dlp, "rsmi_dev_fan_speed_max_get");
719 rsmi_dev_fan_speed_set_p = dlsym(rsmi_dlp, "rsmi_dev_fan_speed_set");
720 rsmi_dev_power_avg_get_p = dlsym(rsmi_dlp, "rsmi_dev_power_ave_get");
721 rsmi_dev_power_cap_get_p = dlsym(rsmi_dlp, "rsmi_dev_power_cap_get");
722 rsmi_dev_power_cap_set_p = dlsym(rsmi_dlp, "rsmi_dev_power_cap_set");
723 rsmi_dev_power_cap_range_get_p = dlsym(rsmi_dlp, "rsmi_dev_power_cap_range_get");
724 rsmi_dev_power_profile_presets_get_p = dlsym(rsmi_dlp, "rsmi_dev_power_profile_presets_get");
725 rsmi_dev_power_profile_set_p = dlsym(rsmi_dlp, "rsmi_dev_power_profile_set");
726 rsmi_dev_temp_metric_get_p = dlsym(rsmi_dlp, "rsmi_dev_temp_metric_get");
727 rsmi_dev_pci_id_get_p = dlsym(rsmi_dlp, "rsmi_dev_pci_id_get");
728 rsmi_dev_pci_throughput_get_p = dlsym(rsmi_dlp, "rsmi_dev_pci_throughput_get");
729 rsmi_dev_pci_replay_counter_get_p = dlsym(rsmi_dlp, "rsmi_dev_pci_replay_counter_get");
730 rsmi_dev_pci_bandwidth_get_p = dlsym(rsmi_dlp, "rsmi_dev_pci_bandwidth_get");
731 rsmi_dev_pci_bandwidth_set_p = dlsym(rsmi_dlp, "rsmi_dev_pci_bandwidth_set");
732 rsmi_dev_gpu_clk_freq_get_p = dlsym(rsmi_dlp, "rsmi_dev_gpu_clk_freq_get");
733 rsmi_dev_gpu_clk_freq_set_p = dlsym(rsmi_dlp, "rsmi_dev_gpu_clk_freq_set");
734 rsmi_dev_od_volt_curve_regions_get_p = dlsym(rsmi_dlp, "rsmi_dev_od_volt_curve_regions_get");
735 rsmi_dev_od_volt_info_get_p = dlsym(rsmi_dlp, "rsmi_dev_od_volt_info_get");
736 rsmi_init_p = dlsym(rsmi_dlp, "rsmi_init");
737 rsmi_shut_down_p = dlsym(rsmi_dlp, "rsmi_shut_down");
738 rsmi_version_get_p = dlsym(rsmi_dlp, "rsmi_version_get");
739 rsmi_version_str_get_p = dlsym(rsmi_dlp, "rsmi_version_str_get");
740 rsmi_status_string_p = dlsym(rsmi_dlp, "rsmi_status_string");
741 rsmi_dev_counter_group_supported_p = dlsym(rsmi_dlp, "rsmi_dev_counter_group_supported");
742 rsmi_dev_counter_create_p = dlsym(rsmi_dlp, "rsmi_dev_counter_create");
743 rsmi_dev_counter_destroy_p = dlsym(rsmi_dlp, "rsmi_dev_counter_destroy");
744 rsmi_counter_control_p = dlsym(rsmi_dlp, "rsmi_counter_control");
745 rsmi_counter_read_p = dlsym(rsmi_dlp, "rsmi_counter_read");
746 rsmi_counter_available_counters_get_p = dlsym(rsmi_dlp, "rsmi_counter_available_counters_get");
747 rsmi_is_P2P_accessible_p = dlsym(rsmi_dlp, "rsmi_is_P2P_accessible");
748 rsmi_minmax_bandwidth_get_p = dlsym(rsmi_dlp, "rsmi_minmax_bandwidth_get");
749
750 int rsmi_not_initialized = (!rsmi_num_monitor_dev_p ||
751 !rsmi_func_iter_value_get_p ||
752 !rsmi_func_iter_next_p ||
753 !rsmi_dev_supported_func_iterator_open_p ||
754 !rsmi_dev_supported_func_iterator_close_p ||
755 !rsmi_dev_supported_variant_iterator_open_p ||
756 !rsmi_dev_id_get_p ||
757 !rsmi_dev_unique_id_get_p ||
758 !rsmi_dev_brand_get_p ||
759 !rsmi_dev_name_get_p ||
760 !rsmi_dev_serial_number_get_p ||
761 !rsmi_dev_vbios_version_get_p ||
762 !rsmi_dev_vendor_name_get_p ||
763 !rsmi_dev_vendor_id_get_p ||
764 !rsmi_dev_subsystem_id_get_p ||
765 !rsmi_dev_subsystem_vendor_id_get_p ||
766 !rsmi_dev_subsystem_name_get_p ||
767 !rsmi_dev_drm_render_minor_get_p ||
768 !rsmi_dev_overdrive_level_get_p ||
769 !rsmi_dev_overdrive_level_set_p ||
770 !rsmi_dev_memory_busy_percent_get_p ||
771 !rsmi_dev_memory_reserved_pages_get_p ||
772 !rsmi_dev_memory_total_get_p ||
773 !rsmi_dev_memory_usage_get_p ||
774 !rsmi_dev_perf_level_get_p ||
775 !rsmi_dev_perf_level_set_p ||
776 !rsmi_dev_busy_percent_get_p ||
777 !rsmi_dev_firmware_version_get_p ||
778 !rsmi_dev_ecc_count_get_p ||
779 !rsmi_dev_ecc_enabled_get_p ||
780 !rsmi_dev_ecc_status_get_p ||
781 !rsmi_dev_fan_reset_p ||
782 !rsmi_dev_fan_rpms_get_p ||
783 !rsmi_dev_fan_speed_get_p ||
784 !rsmi_dev_fan_speed_max_get_p ||
785 !rsmi_dev_fan_speed_set_p ||
786 !rsmi_dev_power_avg_get_p ||
787 !rsmi_dev_power_cap_get_p ||
788 !rsmi_dev_power_cap_set_p ||
789 !rsmi_dev_power_cap_range_get_p ||
790 !rsmi_dev_power_profile_presets_get_p ||
791 !rsmi_dev_power_profile_set_p ||
792 !rsmi_dev_temp_metric_get_p ||
793 !rsmi_dev_pci_id_get_p ||
794 !rsmi_dev_pci_throughput_get_p ||
795 !rsmi_dev_pci_replay_counter_get_p ||
796 !rsmi_dev_pci_bandwidth_get_p ||
797 !rsmi_dev_pci_bandwidth_set_p ||
798 !rsmi_dev_gpu_clk_freq_get_p ||
799 !rsmi_dev_gpu_clk_freq_set_p ||
800 !rsmi_dev_od_volt_curve_regions_get_p ||
801 !rsmi_dev_od_volt_info_get_p ||
802 !rsmi_init_p ||
803 !rsmi_shut_down_p ||
804 !rsmi_version_get_p ||
805 !rsmi_version_str_get_p ||
806 !rsmi_status_string_p ||
807 !rsmi_dev_counter_group_supported_p ||
808 !rsmi_dev_counter_create_p ||
809 !rsmi_dev_counter_destroy_p ||
810 !rsmi_counter_control_p ||
811 !rsmi_counter_read_p ||
812 !rsmi_counter_available_counters_get_p ||
813 !rsmi_is_P2P_accessible_p ||
814 !rsmi_minmax_bandwidth_get_p);
815
816 papi_errno = (rsmi_not_initialized) ? PAPI_EMISC : PAPI_OK;
817 if (papi_errno != PAPI_OK) {
818 sprintf(error_string, "Error while loading rocm_smi symbols.");
819 }
820
821 fn_exit:
822 return papi_errno;
823 fn_fail:
824 papi_errno = PAPI_ENOSUPP;
825 goto fn_exit;
826}
827
828int
829unload_rsmi_sym(void)
830{
831 rsmi_num_monitor_dev_p = NULL;
832 rsmi_func_iter_value_get_p = NULL;
833 rsmi_func_iter_next_p = NULL;
834 rsmi_dev_supported_func_iterator_open_p = NULL;
835 rsmi_dev_supported_func_iterator_close_p = NULL;
836 rsmi_dev_supported_variant_iterator_open_p = NULL;
837 rsmi_dev_id_get_p = NULL;
838 rsmi_dev_unique_id_get_p = NULL;
839 rsmi_dev_brand_get_p = NULL;
840 rsmi_dev_name_get_p = NULL;
841 rsmi_dev_serial_number_get_p = NULL;
842 rsmi_dev_vbios_version_get_p = NULL;
843 rsmi_dev_vendor_name_get_p = NULL;
844 rsmi_dev_vendor_id_get_p = NULL;
845 rsmi_dev_subsystem_id_get_p = NULL;
846 rsmi_dev_subsystem_vendor_id_get_p = NULL;
847 rsmi_dev_subsystem_name_get_p = NULL;
848 rsmi_dev_drm_render_minor_get_p = NULL;
849 rsmi_dev_overdrive_level_get_p = NULL;
850 rsmi_dev_overdrive_level_set_p = NULL;
851 rsmi_dev_memory_busy_percent_get_p = NULL;
852 rsmi_dev_memory_reserved_pages_get_p = NULL;
853 rsmi_dev_memory_total_get_p = NULL;
854 rsmi_dev_memory_usage_get_p = NULL;
855 rsmi_dev_perf_level_get_p = NULL;
856 rsmi_dev_perf_level_set_p = NULL;
857 rsmi_dev_busy_percent_get_p = NULL;
858 rsmi_dev_firmware_version_get_p = NULL;
859 rsmi_dev_ecc_count_get_p = NULL;
860 rsmi_dev_ecc_enabled_get_p = NULL;
861 rsmi_dev_ecc_status_get_p = NULL;
862 rsmi_dev_fan_reset_p = NULL;
863 rsmi_dev_fan_rpms_get_p = NULL;
864 rsmi_dev_fan_speed_get_p = NULL;
865 rsmi_dev_fan_speed_max_get_p = NULL;
866 rsmi_dev_fan_speed_set_p = NULL;
867 rsmi_dev_power_avg_get_p = NULL;
868 rsmi_dev_power_cap_get_p = NULL;
869 rsmi_dev_power_cap_set_p = NULL;
870 rsmi_dev_power_cap_range_get_p = NULL;
871 rsmi_dev_power_profile_presets_get_p = NULL;
872 rsmi_dev_power_profile_set_p = NULL;
873 rsmi_dev_temp_metric_get_p = NULL;
874 rsmi_dev_pci_id_get_p = NULL;
875 rsmi_dev_pci_throughput_get_p = NULL;
876 rsmi_dev_pci_replay_counter_get_p = NULL;
877 rsmi_dev_pci_bandwidth_get_p = NULL;
878 rsmi_dev_pci_bandwidth_set_p = NULL;
879 rsmi_dev_gpu_clk_freq_get_p = NULL;
880 rsmi_dev_gpu_clk_freq_set_p = NULL;
881 rsmi_dev_od_volt_curve_regions_get_p = NULL;
882 rsmi_dev_od_volt_info_get_p = NULL;
883 rsmi_init_p = NULL;
884 rsmi_shut_down_p = NULL;
885 rsmi_version_get_p = NULL;
886 rsmi_version_str_get_p = NULL;
887 rsmi_status_string_p = NULL;
888 rsmi_dev_counter_group_supported_p = NULL;
889 rsmi_dev_counter_create_p = NULL;
890 rsmi_dev_counter_destroy_p = NULL;
891 rsmi_counter_control_p = NULL;
892 rsmi_counter_read_p = NULL;
893 rsmi_counter_available_counters_get_p = NULL;
894 rsmi_is_P2P_accessible_p = NULL;
895 rsmi_minmax_bandwidth_get_p = NULL;
896
897 dlclose(rsmi_dlp);
898
899 return PAPI_OK;
900}
901
902static int get_ntv_events_count(int *count);
903static int get_ntv_events(ntv_event_t *, int);
904
905int
906init_event_table(void)
907{
908 int papi_errno = PAPI_OK;
909
910 int ntv_events_count;
911 papi_errno = get_ntv_events_count(&ntv_events_count);
912 if (papi_errno != PAPI_OK) {
913 return papi_errno;
914 }
915
916 ntv_event_t *ntv_events = papi_calloc(ntv_events_count, sizeof(*ntv_events));
917 if (ntv_events == NULL) {
918 papi_errno = PAPI_ENOMEM;
919 goto fn_fail;
920 }
921
922 papi_errno = get_ntv_events(ntv_events, ntv_events_count);
923 if (papi_errno != PAPI_OK) {
924 goto fn_fail;
925 }
926
927 ntv_table.count = ntv_events_count;
928 ntv_table.events = ntv_events;
929
930 fn_exit:
931 return papi_errno;
932 fn_fail:
933 if (ntv_events) {
934 papi_free(ntv_events);
935 }
936 goto fn_exit;
937}
938
939int
940shutdown_event_table(void)
941{
942 int i;
943 for (i = 0; i < ntv_table.count; ++i) {
944 htable_delete(htable, ntv_table.events[i].name);
945 papi_free(ntv_table.events[i].name);
946 papi_free(ntv_table.events[i].descr);
947 }
948 papi_free(ntv_table.events);
949 ntv_table.events = NULL;
950 ntv_table.count = 0;
951 return PAPI_OK;
952}
953
954int
955acquire_devices(unsigned int *events_id, int num_events, int32_t *bitmask)
956{
957 int i;
958 int32_t device_mask_acq = 0;
959
960 for (i = 0; i < num_events; ++i) {
961 int32_t device_id = ntv_table_p->events[events_id[i]].device;
962 if (device_id < 0) {
963 continue;
964 }
965 device_mask_acq |= (1 << device_id);
966 }
967
968 if (device_mask_acq & device_mask) {
969 return PAPI_ECNFLCT;
970 }
971
972 device_mask |= device_mask_acq;
973 *bitmask = device_mask_acq;
974
975 return PAPI_OK;
976}
977
978int
979release_devices(int32_t *bitmask)
980{
981 int32_t device_mask_rel = *bitmask;
982
983 if ((device_mask_rel & device_mask) != device_mask_rel) {
984 return PAPI_EMISC;
985 }
986
987 device_mask ^= device_mask_rel;
988 *bitmask ^= device_mask_rel;
989
990 return PAPI_OK;
991}
992
993int
994init_device_table(void)
995{
996 int papi_errno = PAPI_OK;
997 int i, j;
998 rsmi_status_t status;
999
1000 freq_table = calloc(device_count * ROCS_GPU_CLK_FREQ_VARIANT__NUM, sizeof(rsmi_frequencies_t));
1001 if (freq_table == NULL) {
1002 papi_errno = PAPI_ENOMEM;
1003 goto fn_fail;
1004 }
1005
1006 pcie_table = calloc(device_count, sizeof(rsmi_pcie_bandwidth_t));
1007 if (pcie_table == NULL) {
1008 papi_errno = PAPI_ENOMEM;
1009 goto fn_fail;
1010 }
1011
1012 for (i = 0; i < device_count; ++i) {
1013 for (j = 0; j < ROCS_GPU_CLK_FREQ_VARIANT__NUM; ++j) {
1014 int table_id = ROCS_GPU_CLK_FREQ_VARIANT__NUM * i + j;
1015 status = rsmi_dev_gpu_clk_freq_get_p(i, j, &freq_table[table_id]);
1016 if (status != RSMI_STATUS_SUCCESS && status != RSMI_STATUS_NOT_SUPPORTED) {
1017 papi_errno = PAPI_EMISC;
1018 goto fn_fail;
1019 }
1020 }
1021 }
1022
1023 for (i = 0; i < device_count; ++i) {
1024 status = rsmi_dev_pci_bandwidth_get_p(i, &pcie_table[i]);
1025 if (status != RSMI_STATUS_SUCCESS && status != RSMI_STATUS_NOT_YET_IMPLEMENTED) {
1026 papi_errno = PAPI_EMISC;
1027 goto fn_fail;
1028 }
1029 }
1030
1031 fn_exit:
1032 return papi_errno;
1033 fn_fail:
1034 if (freq_table) {
1035 papi_free(freq_table);
1036 freq_table = NULL;
1037 }
1038 if (pcie_table) {
1039 papi_free(pcie_table);
1040 pcie_table = NULL;
1041 }
1042 goto fn_exit;
1043}
1044
1045int
1046shutdown_device_table(void)
1047{
1048 if (freq_table) {
1049 papi_free(freq_table);
1050 }
1051
1052 if (pcie_table) {
1053 papi_free(pcie_table);
1054 }
1055
1056 return PAPI_OK;
1057}
1058
1059#define ROCMSMI_NUM_INFO_EVENTS (3)
1060
1061typedef enum {
1062 ROCS_EVENT_TYPE__NORMAL = 0,
1063 ROCS_EVENT_TYPE__SPECIAL,
1064} rocs_event_type_e;
1065
1066static int handle_special_events_count(const char *v_name, int32_t dev, int64_t v_variant, int64_t v_subvariant, int *count);
1067static int handle_xgmi_events_count(int32_t dev, int *count);
1068static char *get_event_name(const char *name, int32_t dev, int64_t variant, int64_t subvariant);
1069
1070int
1071get_ntv_events_count(int *count)
1072{
1073 int papi_errno = PAPI_OK;
1074 int events_count = ROCMSMI_NUM_INFO_EVENTS;
1075 rsmi_func_id_iter_handle_t iter;
1076 rsmi_func_id_iter_handle_t var_iter;
1077 rsmi_func_id_iter_handle_t subvar_iter;
1078 rsmi_func_id_value_t v_name;
1079 rsmi_func_id_value_t v_variant;
1080 rsmi_func_id_value_t v_subvariant;
1081 rsmi_status_t status;
1082
1083 int32_t dev;
1084 for (dev = 0; dev < device_count; ++dev) {
1085 status = rsmi_dev_supported_func_iterator_open_p(dev, &iter);
1086 if (status != RSMI_STATUS_SUCCESS) {
1087 continue;
1088 }
1089 while (1) {
1090 status = rsmi_func_iter_value_get_p(iter, &v_name);
1091 if (status != RSMI_STATUS_SUCCESS) {
1092 continue;
1093 }
1094 status = rsmi_dev_supported_variant_iterator_open_p(iter, &var_iter);
1095 if (status == RSMI_STATUS_NO_DATA) {
1096 if (handle_special_events_count(v_name.name, dev, -1, -1, &events_count) == ROCS_EVENT_TYPE__NORMAL) {
1097 char *name = get_event_name(v_name.name, dev, -1, -1);
1098 if (name) {
1099 /* count known events */
1100 ++events_count;
1101 papi_free(name);
1102 }
1103 }
1104 } else {
1105 while (status != RSMI_STATUS_NO_DATA) {
1106 status = rsmi_func_iter_value_get_p(var_iter, &v_variant);
1107 if (status != RSMI_STATUS_SUCCESS) {
1108 continue;
1109 }
1110 status = rsmi_dev_supported_variant_iterator_open_p(var_iter, &subvar_iter);
1111 if (status == RSMI_STATUS_NO_DATA) {
1112 if (handle_special_events_count(v_name.name, dev, v_variant.id, -1, &events_count) == ROCS_EVENT_TYPE__NORMAL) {
1113 char *name = get_event_name(v_name.name, dev, v_variant.id, -1);
1114 if (name) {
1115 /* count known events */
1116 ++events_count;
1117 papi_free(name);
1118 }
1119 }
1120 } else {
1121 while (status != RSMI_STATUS_NO_DATA) {
1122 status = rsmi_func_iter_value_get_p(subvar_iter, &v_subvariant);
1123 if (status != RSMI_STATUS_SUCCESS) {
1124 continue;
1125 }
1126 if (handle_special_events_count(v_name.name, dev, v_variant.id, v_subvariant.id, &events_count) == ROCS_EVENT_TYPE__NORMAL) {
1127 char *name = get_event_name(v_name.name, dev, v_variant.id, v_subvariant.id);
1128 if (name) {
1129 /* count known events */
1130 ++events_count;
1131 papi_free(name);
1132 }
1133 }
1134 status = rsmi_func_iter_next_p(subvar_iter);
1135 }
1136 status = rsmi_dev_supported_func_iterator_close_p(&subvar_iter);
1137 if (status != RSMI_STATUS_SUCCESS) {
1138 papi_errno = PAPI_EMISC;
1139 goto fn_fail;
1140 }
1141 }
1142 status = rsmi_func_iter_next_p(var_iter);
1143 }
1144 status = rsmi_dev_supported_func_iterator_close_p(&var_iter);
1145 if (status != RSMI_STATUS_SUCCESS) {
1146 papi_errno = PAPI_EMISC;
1147 goto fn_fail;
1148 }
1149 }
1150 status = rsmi_func_iter_next_p(iter);
1151 if (status == RSMI_STATUS_NO_DATA) {
1152 break;
1153 }
1154 }
1155 status = rsmi_dev_supported_func_iterator_close_p(&iter);
1156 if (status != RSMI_STATUS_SUCCESS) {
1157 papi_errno = PAPI_EMISC;
1158 goto fn_fail;
1159 }
1160
1161 handle_xgmi_events_count(dev, &events_count);
1162 }
1163
1164 *count = events_count;
1165
1166 fn_exit:
1167 return papi_errno;
1168 fn_fail:
1169 goto fn_exit;
1170}
1171
1172static rocs_access_mode_e get_access_mode(const char *);
1173static char *get_event_descr(const char *name, int64_t variant, int64_t subvariant);
1174static open_function_f get_open_func(const char *name);
1175static close_function_f get_close_func(const char *name);
1176static start_function_f get_start_func(const char *name);
1177static stop_function_f get_stop_func(const char *name);
1178static access_function_f get_access_func(const char *name);
1179static int handle_special_events(const char *name, int32_t dev, int64_t variant, int64_t subvariant, int *count, ntv_event_t *events);
1180static int handle_xgmi_events(int32_t dev, int *count, ntv_event_t *events);
1181
1182int
1183get_ntv_events(ntv_event_t *events, int count)
1184{
1185 int papi_errno = PAPI_OK;
1186 rsmi_func_id_iter_handle_t iter;
1187 rsmi_func_id_iter_handle_t var_iter;
1188 rsmi_func_id_iter_handle_t subvar_iter;
1189 rsmi_func_id_value_t v_name;
1190 rsmi_func_id_value_t v_variant;
1191 rsmi_func_id_value_t v_subvariant;
1192 rsmi_status_t status;
1193 int events_count = 0;
1194
1195 const char *first_events[] = {
1196 "rsmi_dev_count",
1197 "rsmi_lib_version",
1198 "rsmi_dev_driver_version_str_get",
1199 };
1200
1201 int i;
1202 for (i = 0; i < ROCMSMI_NUM_INFO_EVENTS; ++i) {
1203 events[events_count].id = events_count;
1204 events[events_count].name = get_event_name(first_events[i], -1, -1, -1);
1205 events[events_count].descr = get_event_descr(first_events[i], -1, -1);
1206 events[events_count].device = -1;
1207 events[events_count].variant = -1;
1208 events[events_count].subvariant = -1;
1209 events[events_count].mode = ROCS_ACCESS_MODE__READ;
1210 events[events_count].open_func_p = get_open_func(first_events[i]);
1211 events[events_count].close_func_p = get_close_func(first_events[i]);
1212 events[events_count].start_func_p = get_start_func(first_events[i]);
1213 events[events_count].stop_func_p = get_stop_func(first_events[i]);
1214 events[events_count].access_func_p = get_access_func(first_events[i]);
1215 htable_insert(htable, events[events_count].name, &events[events_count]);
1216 ++events_count;
1217 }
1218
1219 int32_t dev;
1220 for (dev = 0; dev < device_count; ++dev) {
1221 status = rsmi_dev_supported_func_iterator_open_p(dev, &iter);
1222 if (status != RSMI_STATUS_SUCCESS) {
1223 continue;
1224 }
1225 while (1) {
1226 status = rsmi_func_iter_value_get_p(iter, &v_name);
1227 if (status != RSMI_STATUS_SUCCESS) {
1228 continue;
1229 }
1230 status = rsmi_dev_supported_variant_iterator_open_p(iter, &var_iter);
1231 if (status == RSMI_STATUS_NO_DATA) {
1232 if (handle_special_events(v_name.name, dev, -1, -1, &events_count, events) == ROCS_EVENT_TYPE__NORMAL) {
1233 char *name = get_event_name(v_name.name, dev, -1, -1);
1234 if (name) {
1235 /* add known events */
1236 events[events_count].id = events_count;
1237 events[events_count].name = name;
1238 events[events_count].descr = get_event_descr(v_name.name, -1, -1);
1239 events[events_count].device = dev;
1240 events[events_count].variant = -1;
1241 events[events_count].subvariant = -1;
1242 events[events_count].mode = get_access_mode(v_name.name);
1243 events[events_count].open_func_p = get_open_func(v_name.name);
1244 events[events_count].close_func_p = get_close_func(v_name.name);
1245 events[events_count].start_func_p = get_start_func(v_name.name);
1246 events[events_count].stop_func_p = get_stop_func(v_name.name);
1247 events[events_count].access_func_p = get_access_func(v_name.name);
1248 htable_insert(htable, events[events_count].name, &events[events_count]);
1249 ++events_count;
1250 }
1251 }
1252 } else {
1253 while (status != RSMI_STATUS_NO_DATA) {
1254 status = rsmi_func_iter_value_get_p(var_iter, &v_variant);
1255 if (status != RSMI_STATUS_SUCCESS) {
1256 continue;
1257 }
1258 status = rsmi_dev_supported_variant_iterator_open_p(var_iter, &subvar_iter);
1259 if (status == RSMI_STATUS_NO_DATA) {
1260 if (handle_special_events(v_name.name, dev, v_variant.id, -1, &events_count, events) == ROCS_EVENT_TYPE__NORMAL) {
1261 char *name = get_event_name(v_name.name, dev, v_variant.id, -1);
1262 if (name) {
1263 /* add known events */
1264 events[events_count].id = events_count;
1265 events[events_count].name = name;
1266 events[events_count].descr = get_event_descr(v_name.name, v_variant.id, -1);
1267 events[events_count].device = dev;
1268 events[events_count].variant = v_variant.id;
1269 events[events_count].subvariant = -1;
1270 events[events_count].open_func_p = get_open_func(v_name.name);
1271 events[events_count].close_func_p = get_close_func(v_name.name);
1272 events[events_count].start_func_p = get_start_func(v_name.name);
1273 events[events_count].stop_func_p = get_stop_func(v_name.name);
1274 events[events_count].mode = get_access_mode(v_name.name);
1275 events[events_count].access_func_p = get_access_func(v_name.name);
1276 htable_insert(htable, events[events_count].name, &events[events_count]);
1277 ++events_count;
1278 }
1279 }
1280 } else {
1281 while (status != RSMI_STATUS_NO_DATA) {
1282 status = rsmi_func_iter_value_get_p(subvar_iter, &v_subvariant);
1283 if (status != RSMI_STATUS_SUCCESS) {
1284 continue;
1285 }
1286 if (handle_special_events(v_name.name, dev, v_variant.id, v_subvariant.id, &events_count, events) == ROCS_EVENT_TYPE__NORMAL) {
1287 char *name = get_event_name(v_name.name, dev, v_variant.id, v_subvariant.id);
1288 if (name) {
1289 /* add known events */
1290 events[events_count].id = events_count;
1291 events[events_count].name = name;
1292 events[events_count].descr = get_event_descr(v_name.name, v_variant.id, v_subvariant.id);
1293 events[events_count].device = dev;
1294 events[events_count].variant = v_variant.id;
1295 events[events_count].subvariant = v_subvariant.id;
1296 events[events_count].mode = get_access_mode(v_name.name);
1297 events[events_count].open_func_p = get_open_func(v_name.name);
1298 events[events_count].close_func_p = get_close_func(v_name.name);
1299 events[events_count].start_func_p = get_start_func(v_name.name);
1300 events[events_count].stop_func_p = get_stop_func(v_name.name);
1301 events[events_count].access_func_p = get_access_func(v_name.name);
1302 htable_insert(htable, events[events_count].name, &events[events_count]);
1303 ++events_count;
1304 }
1305 }
1306 status = rsmi_func_iter_next_p(subvar_iter);
1307 }
1308 status = rsmi_dev_supported_func_iterator_close_p(&subvar_iter);
1309 if (status != RSMI_STATUS_SUCCESS) {
1310 papi_errno = PAPI_EMISC;
1311 goto fn_fail;
1312 }
1313 }
1314 status = rsmi_func_iter_next_p(var_iter);
1315 }
1316 status = rsmi_dev_supported_func_iterator_close_p(&var_iter);
1317 if (status != RSMI_STATUS_SUCCESS) {
1318 papi_errno = PAPI_EMISC;
1319 goto fn_fail;
1320 }
1321 }
1322 status = rsmi_func_iter_next_p(iter);
1323 if (status == RSMI_STATUS_NO_DATA) {
1324 break;
1325 }
1326 }
1327 status = rsmi_dev_supported_func_iterator_close_p(&iter);
1328 if (status != RSMI_STATUS_SUCCESS) {
1329 papi_errno = PAPI_EMISC;
1330 goto fn_fail;
1331 }
1332
1333 handle_xgmi_events(dev, &events_count, events);
1334 }
1335
1336 papi_errno = (events_count - count) ? PAPI_ECMP : PAPI_OK;
1337
1338 fn_exit:
1339 return papi_errno;
1340 fn_fail:
1341 goto fn_exit;
1342}
1343
1344int
1345handle_special_events_count(const char *v_name, int32_t dev, int64_t v_variant, int64_t v_subvariant, int *events_count)
1346{
1347 /* NOTE: special cases are two:
1348 * (a) one rsmi event contains aggregated pieces of data and is thus
1349 * split into separate events in the rocm smi component;
1350 * (b) two rsmi events are merged into a single one in the rocm smi
1351 * component. An example is the variants set/get which are
1352 * both represented by the same native event in PAPI.
1353 */
1354
1355 if (strcmp(v_name, "rsmi_dev_pci_throughput_get") == 0) {
1356 (*events_count) += ROCS_PCI_THROUGHPUT_VARIANT__NUM;
1357 return ROCS_EVENT_TYPE__SPECIAL;
1358 }
1359
1360 if (strcmp(v_name, "rsmi_dev_power_profile_presets_get") == 0) {
1361 (*events_count) += ROCS_POWER_PRESETS_VARIANT__NUM;
1362 return ROCS_EVENT_TYPE__SPECIAL;
1363 }
1364
1365 if (strcmp(v_name, "rsmi_dev_power_cap_range_get") == 0) {
1366 (*events_count) += ROCS_POWER_CAP_RANGE_VARIANT__NUM;
1367 return ROCS_EVENT_TYPE__SPECIAL;
1368 }
1369
1370 if (strcmp(v_name, "rsmi_dev_ecc_count_get") == 0) {
1371 (*events_count) += ROCS_ECC_COUNT_SUBVARIANT__NUM;
1372 return ROCS_EVENT_TYPE__SPECIAL;
1373 }
1374
1375 if (strcmp(v_name, "rsmi_dev_pci_bandwidth_get") == 0) {
1376 if (pcie_table[dev].transfer_rate.num_supported) {
1377 (*events_count) += ROCS_PCI_BW_VARIANT__CURRENT + 1;
1378 }
1379 int i;
1380 for (i = 0; i < ROCS_PCI_BW_VARIANT__LANE_IDX - ROCS_PCI_BW_VARIANT__CURRENT + 1; ++i) {
1381 (*events_count) += pcie_table[dev].transfer_rate.num_supported;
1382 }
1383
1384 return ROCS_EVENT_TYPE__SPECIAL;
1385 }
1386
1387 if (strcmp(v_name, "rsmi_dev_pci_bandwidth_set") == 0) {
1388 if (pcie_table[dev].transfer_rate.num_supported) {
1389 ++(*events_count);
1390 }
1391 return ROCS_EVENT_TYPE__SPECIAL;
1392 }
1393
1394 if (strcmp(v_name, "rsmi_dev_gpu_clk_freq_get") == 0) {
1395 int table_id = dev * ROCS_GPU_CLK_FREQ_VARIANT__NUM + v_variant;
1396 (*events_count) += freq_table[table_id].num_supported;
1397 if (freq_table[table_id].num_supported) {
1398 (*events_count) += ROCS_GPU_CLK_FREQ_SUBVARIANT__NUM;
1399 }
1400 return ROCS_EVENT_TYPE__SPECIAL;
1401 }
1402
1403 if (strcmp(v_name, "rsmi_dev_gpu_clk_freq_set") == 0) {
1404 int table_id = dev * ROCS_GPU_CLK_FREQ_VARIANT__NUM + v_variant;
1405 if (freq_table[table_id].num_supported) {
1406 ++(*events_count);
1407 }
1408 return ROCS_EVENT_TYPE__SPECIAL;
1409 }
1410
1411 static int rsmi_dev_fan_speed_count[PAPI_ROCMSMI_MAX_DEV_COUNT];
1412 if (strcmp(v_name, "rsmi_dev_fan_speed_get") == 0 || strcmp(v_name, "rsmi_dev_fan_speed_set") == 0) {
1413 if (rsmi_dev_fan_speed_count[dev] == 0) {
1414 rsmi_dev_fan_speed_count[dev] = *events_count;
1415 return ROCS_EVENT_TYPE__NORMAL;
1416 }
1417
1418 return ROCS_EVENT_TYPE__SPECIAL;
1419 }
1420
1421 static int rsmi_dev_power_cap_count[PAPI_ROCMSMI_MAX_DEV_COUNT][PAPI_ROCMSMI_MAX_SUBVAR];
1422 if (strcmp(v_name, "rsmi_dev_power_cap_get") == 0 || strcmp(v_name, "rsmi_dev_power_cap_set") == 0) {
1423 if (rsmi_dev_power_cap_count[dev][v_subvariant] == 0) {
1424 rsmi_dev_power_cap_count[dev][v_subvariant] = *events_count;
1425 return ROCS_EVENT_TYPE__NORMAL;
1426 }
1427
1428 return ROCS_EVENT_TYPE__SPECIAL;
1429 }
1430
1431 static int rsmi_dev_perf_level_count[PAPI_ROCMSMI_MAX_DEV_COUNT];
1432 if (strncmp(v_name, "rsmi_dev_perf_level", strlen("rsmi_dev_perf_level")) == 0) {
1433 if (rsmi_dev_perf_level_count[dev] == 0) {
1434 rsmi_dev_perf_level_count[dev] = *events_count;
1435 return ROCS_EVENT_TYPE__NORMAL;
1436 }
1437
1438 return ROCS_EVENT_TYPE__SPECIAL;
1439 }
1440
1441
1442 return ROCS_EVENT_TYPE__NORMAL;
1443}
1444
1445int
1446handle_xgmi_events_count(int32_t dev, int *events_count)
1447{
1448 rsmi_status_t status;
1449
1450 status = rsmi_dev_counter_group_supported_p(dev, RSMI_EVNT_GRP_XGMI);
1451 if (status == RSMI_STATUS_SUCCESS) {
1452 *events_count += RSMI_EVNT_XGMI_LAST - RSMI_EVNT_XGMI_FIRST;
1453 }
1454
1455 status = rsmi_dev_counter_group_supported_p(dev, RSMI_EVNT_GRP_XGMI_DATA_OUT);
1456 if (status == RSMI_STATUS_SUCCESS) {
1457 *events_count += RSMI_EVNT_XGMI_DATA_OUT_LAST - RSMI_EVNT_XGMI_DATA_OUT_FIRST;
1458 }
1459
1460 uint32_t i;
1461 for (i = 0; i < (uint32_t) device_count; ++i) {
1462 if (i == (uint32_t) dev) {
1463 continue;
1464 }
1465 rsmi_status_t status;
1466 int res = 0;
1467 status = rsmi_is_P2P_accessible_p((uint32_t) dev, i, &res);
1468 if (status != RSMI_STATUS_SUCCESS) {
1469 break;
1470 }
1471 uint64_t min, max;
1472 status = rsmi_minmax_bandwidth_get_p((uint32_t) dev, i, &min, &max);
1473 if (status != RSMI_STATUS_SUCCESS) {
1474 break;
1475 }
1476 if (res == 1) {
1477 (*events_count) += ROCS_XGMI_BW_VARIANT__NUM;
1478 }
1479 }
1480
1481 return PAPI_OK;
1482}
1483
1484int
1485handle_special_events(const char *v_name, int32_t dev, int64_t v_variant, int64_t v_subvariant, int *events_count, ntv_event_t *events)
1486{
1487 /* NOTE: special cases are two:
1488 * (a) one rsmi event contains aggregated pieces of data and is thus
1489 * split into separate events in the rocm smicomponent;
1490 * (b) two rsmi events are merged into a single one in the rocm smi
1491 * component. An example is the variants set/get which are
1492 * both represented by the same native event in PAPI.
1493 */
1494
1495 if (strcmp(v_name, "rsmi_dev_pci_throughput_get") == 0) {
1496 int64_t i;
1497 for (i = 0; i < ROCS_PCI_THROUGHPUT_VARIANT__NUM; ++i) {
1498 events[*events_count].id = *events_count;
1499 events[*events_count].name = get_event_name(v_name, dev, i, -1);
1500 events[*events_count].descr = get_event_descr(v_name, i, -1);
1501 events[*events_count].device = dev;
1502 events[*events_count].variant = i;
1503 events[*events_count].subvariant = -1;
1504 events[*events_count].mode = ROCS_ACCESS_MODE__READ;
1505 events[*events_count].open_func_p = get_open_func(v_name);
1506 events[*events_count].close_func_p = get_close_func(v_name);
1507 events[*events_count].start_func_p = get_start_func(v_name);
1508 events[*events_count].stop_func_p = get_stop_func(v_name);
1509 events[*events_count].access_func_p = get_access_func(v_name);
1510 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1511 ++(*events_count);
1512 }
1513
1514 return ROCS_EVENT_TYPE__SPECIAL;
1515 }
1516
1517 if (strcmp(v_name, "rsmi_dev_power_profile_presets_get") == 0) {
1518 int64_t i;
1519 for (i = 0; i < ROCS_POWER_PRESETS_VARIANT__NUM; ++i) {
1520 events[*events_count].id = *events_count;
1521 events[*events_count].name = get_event_name(v_name, dev, i, -1);
1522 events[*events_count].descr = get_event_descr(v_name, i, -1);
1523 events[*events_count].device = dev;
1524 events[*events_count].variant = i;
1525 events[*events_count].subvariant = -1;
1526 events[*events_count].mode = ROCS_ACCESS_MODE__READ;
1527 events[*events_count].open_func_p = get_open_func(v_name);
1528 events[*events_count].close_func_p = get_close_func(v_name);
1529 events[*events_count].start_func_p = get_start_func(v_name);
1530 events[*events_count].stop_func_p = get_stop_func(v_name);
1531 events[*events_count].access_func_p = get_access_func(v_name);
1532 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1533 ++(*events_count);
1534 }
1535
1536 return ROCS_EVENT_TYPE__SPECIAL;
1537 }
1538
1539 if (strcmp(v_name, "rsmi_dev_power_cap_range_get") == 0) {
1540 int64_t i;
1541 for (i = 0; i < ROCS_POWER_CAP_RANGE_VARIANT__NUM; ++i) {
1542 events[*events_count].id = *events_count;
1543 events[*events_count].name = get_event_name(v_name, dev, i, v_subvariant);
1544 events[*events_count].descr = get_event_descr(v_name, i, v_subvariant);
1545 events[*events_count].device = dev;
1546 events[*events_count].variant = i;
1547 events[*events_count].subvariant = v_subvariant;
1548 events[*events_count].mode = ROCS_ACCESS_MODE__READ;
1549 events[*events_count].open_func_p = get_open_func(v_name);
1550 events[*events_count].close_func_p = get_close_func(v_name);
1551 events[*events_count].start_func_p = get_start_func(v_name);
1552 events[*events_count].stop_func_p = get_stop_func(v_name);
1553 events[*events_count].access_func_p = get_access_func(v_name);
1554 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1555 ++(*events_count);
1556 }
1557
1558 return ROCS_EVENT_TYPE__SPECIAL;
1559 }
1560
1561 if (strcmp(v_name, "rsmi_dev_ecc_count_get") == 0) {
1562 int64_t i;
1563 for (i = 0; i < ROCS_ECC_COUNT_SUBVARIANT__NUM; ++i) {
1564 events[*events_count].id = *events_count;
1565 events[*events_count].name = get_event_name(v_name, dev, v_variant, i);
1566 events[*events_count].descr = get_event_descr(v_name, v_variant, i);
1567 events[*events_count].device = dev;
1568 events[*events_count].variant = v_variant;
1569 events[*events_count].subvariant = i;
1570 events[*events_count].mode = ROCS_ACCESS_MODE__READ;
1571 events[*events_count].open_func_p = get_open_func(v_name);
1572 events[*events_count].close_func_p = get_close_func(v_name);
1573 events[*events_count].start_func_p = get_start_func(v_name);
1574 events[*events_count].stop_func_p = get_stop_func(v_name);
1575 events[*events_count].access_func_p = get_access_func(v_name);
1576 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1577 ++(*events_count);
1578 }
1579
1580 return ROCS_EVENT_TYPE__SPECIAL;
1581 }
1582
1583 if (strcmp(v_name, "rsmi_dev_pci_bandwidth_get") == 0) {
1584 if (pcie_table[dev].transfer_rate.num_supported == 0) {
1585 return ROCS_EVENT_TYPE__SPECIAL;
1586 }
1587
1588 int64_t i;
1589 for (i = 0; i <= ROCS_PCI_BW_VARIANT__CURRENT; ++i) {
1590 events[*events_count].id = *events_count;
1591 events[*events_count].name = get_event_name(v_name, dev, i, -1);
1592 events[*events_count].descr = get_event_descr(v_name, i, -1);
1593 events[*events_count].device = dev;
1594 events[*events_count].variant = i;
1595 events[*events_count].subvariant = -1;
1596 events[*events_count].mode = ROCS_ACCESS_MODE__READ;
1597 events[*events_count].open_func_p = get_open_func(v_name);
1598 events[*events_count].close_func_p = get_close_func(v_name);
1599 events[*events_count].start_func_p = get_start_func(v_name);
1600 events[*events_count].stop_func_p = get_stop_func(v_name);
1601 events[*events_count].access_func_p = get_access_func(v_name);
1602 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1603 ++(*events_count);
1604 }
1605
1606 int64_t j;
1607 for (; i <= ROCS_PCI_BW_VARIANT__LANE_IDX; ++i) {
1608 for (j = 0; j < pcie_table[dev].transfer_rate.num_supported; ++j) {
1609 events[*events_count].id = *events_count;
1610 events[*events_count].name = get_event_name(v_name, dev, i, j);
1611 events[*events_count].descr = get_event_descr(v_name, i, j);
1612 events[*events_count].device = dev;
1613 events[*events_count].variant = i;
1614 events[*events_count].subvariant = j;
1615 events[*events_count].mode = ROCS_ACCESS_MODE__READ;
1616 events[*events_count].open_func_p = get_open_func(v_name);
1617 events[*events_count].close_func_p = get_close_func(v_name);
1618 events[*events_count].start_func_p = get_start_func(v_name);
1619 events[*events_count].stop_func_p = get_stop_func(v_name);
1620 events[*events_count].access_func_p = get_access_func(v_name);
1621 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1622 ++(*events_count);
1623 }
1624 }
1625
1626 return ROCS_EVENT_TYPE__SPECIAL;
1627 }
1628
1629 if (strcmp(v_name, "rsmi_dev_pci_bandwidth_set") == 0) {
1630 if (pcie_table[dev].transfer_rate.num_supported) {
1631 events[*events_count].id = *events_count;
1632 events[*events_count].name = get_event_name(v_name, dev, v_variant, v_subvariant);
1633 events[*events_count].descr = get_event_descr(v_name, v_variant, v_subvariant);
1634 events[*events_count].device = dev;
1635 events[*events_count].variant = v_variant;
1636 events[*events_count].subvariant = v_subvariant;
1637 events[*events_count].mode = ROCS_ACCESS_MODE__WRITE;
1638 events[*events_count].open_func_p = get_open_func(v_name);
1639 events[*events_count].close_func_p = get_close_func(v_name);
1640 events[*events_count].start_func_p = get_start_func(v_name);
1641 events[*events_count].stop_func_p = get_stop_func(v_name);
1642 events[*events_count].access_func_p = get_access_func(v_name);
1643 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1644 ++(*events_count);
1645 }
1646
1647 return ROCS_EVENT_TYPE__SPECIAL;
1648 }
1649
1650 if (strcmp(v_name, "rsmi_dev_gpu_clk_freq_get") == 0) {
1651 int64_t i;
1652 int table_id = dev * ROCS_GPU_CLK_FREQ_VARIANT__NUM + v_variant;
1653 for (i = 0; i < ROCS_GPU_CLK_FREQ_SUBVARIANT__NUM; ++i) {
1654 if (freq_table[table_id].num_supported) {
1655 events[*events_count].id = *events_count;
1656 events[*events_count].name = get_event_name(v_name, dev, v_variant, i);
1657 events[*events_count].descr = get_event_descr(v_name, v_variant, i);
1658 events[*events_count].device = dev;
1659 events[*events_count].variant = v_variant;
1660 events[*events_count].subvariant = i;
1661 events[*events_count].mode = ROCS_ACCESS_MODE__READ;
1662 events[*events_count].open_func_p = get_open_func(v_name);
1663 events[*events_count].close_func_p = get_close_func(v_name);
1664 events[*events_count].start_func_p = get_start_func(v_name);
1665 events[*events_count].stop_func_p = get_stop_func(v_name);
1666 events[*events_count].access_func_p = get_access_func(v_name);
1667 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1668 ++(*events_count);
1669 }
1670 }
1671
1672 for (i = 0; i < freq_table[table_id].num_supported; ++i) {
1673 int idx = ROCS_GPU_CLK_FREQ_SUBVARIANT__NUM + i;
1674 events[*events_count].id = *events_count;
1675 events[*events_count].name = get_event_name(v_name, dev, v_variant, idx);
1676 events[*events_count].descr = get_event_descr(v_name, v_variant, idx);
1677 events[*events_count].device = dev;
1678 events[*events_count].variant = v_variant;
1679 events[*events_count].subvariant = idx;
1680 events[*events_count].mode = ROCS_ACCESS_MODE__READ;
1681 events[*events_count].open_func_p = get_open_func(v_name);
1682 events[*events_count].close_func_p = get_close_func(v_name);
1683 events[*events_count].start_func_p = get_start_func(v_name);
1684 events[*events_count].stop_func_p = get_stop_func(v_name);
1685 events[*events_count].access_func_p = get_access_func(v_name);
1686 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1687 ++(*events_count);
1688 }
1689
1690 return ROCS_EVENT_TYPE__SPECIAL;
1691 }
1692
1693 if (strcmp(v_name, "rsmi_dev_gpu_clk_freq_set") == 0) {
1694 int table_id = dev * ROCS_GPU_CLK_FREQ_VARIANT__NUM + v_variant;
1695 if (freq_table[table_id].num_supported) {
1696 events[*events_count].id = *events_count;
1697 events[*events_count].name = get_event_name(v_name, dev, v_variant, -1);
1698 events[*events_count].descr = get_event_descr(v_name, v_variant, -1);
1699 events[*events_count].device = dev;
1700 events[*events_count].variant = v_variant;
1701 events[*events_count].subvariant = -1;
1702 events[*events_count].mode = ROCS_ACCESS_MODE__WRITE;
1703 events[*events_count].open_func_p = get_open_func(v_name);
1704 events[*events_count].close_func_p = get_close_func(v_name);
1705 events[*events_count].start_func_p = get_start_func(v_name);
1706 events[*events_count].stop_func_p = get_stop_func(v_name);
1707 events[*events_count].access_func_p = get_access_func(v_name);
1708 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1709 ++(*events_count);
1710 }
1711
1712 return ROCS_EVENT_TYPE__SPECIAL;
1713 }
1714
1715 static int rsmi_dev_fan_speed_count[PAPI_ROCMSMI_MAX_DEV_COUNT];
1716 if (strcmp(v_name, "rsmi_dev_fan_speed_get") == 0 || strcmp(v_name, "rsmi_dev_fan_speed_set") == 0) {
1717 if (rsmi_dev_fan_speed_count[dev] == 0) {
1718 rsmi_dev_fan_speed_count[dev] = *events_count;
1719 return ROCS_EVENT_TYPE__NORMAL;
1720 }
1721
1722 if (strcmp(v_name, "rsmi_dev_fan_speed_set") == 0) {
1723 /* Set overwrites Get, update event description */
1724 papi_free(events[rsmi_dev_fan_speed_count[dev]].descr);
1725 events[rsmi_dev_fan_speed_count[dev]].descr = get_event_descr(v_name, -1, -1);
1726 events[rsmi_dev_fan_speed_count[dev]].mode = ROCS_ACCESS_MODE__RDWR;
1727 }
1728
1729 return ROCS_EVENT_TYPE__SPECIAL;
1730 }
1731
1732 static int rsmi_dev_power_cap_count[PAPI_ROCMSMI_MAX_DEV_COUNT][PAPI_ROCMSMI_MAX_SUBVAR];
1733 if (strcmp(v_name, "rsmi_dev_power_cap_get") == 0 || strcmp(v_name, "rsmi_dev_power_cap_set") == 0) {
1734 if (rsmi_dev_power_cap_count[dev][v_subvariant] == 0) {
1735 rsmi_dev_power_cap_count[dev][v_subvariant] = *events_count;
1736 return ROCS_EVENT_TYPE__NORMAL;
1737 }
1738
1739 if (strcmp(v_name, "rsmi_dev_power_cap_set") == 0) {
1740 /* Set overwrites Get, update event description */
1741 papi_free(events[rsmi_dev_power_cap_count[dev][v_subvariant]].descr);
1742 events[rsmi_dev_power_cap_count[dev][v_subvariant]].descr = get_event_descr(v_name, -1, -1);
1743 events[rsmi_dev_power_cap_count[dev][v_subvariant]].mode = ROCS_ACCESS_MODE__RDWR;
1744 }
1745
1746 return ROCS_EVENT_TYPE__SPECIAL;
1747 }
1748
1749 static int rsmi_dev_perf_level_count[PAPI_ROCMSMI_MAX_DEV_COUNT];
1750 if (strncmp(v_name, "rsmi_dev_perf_level", strlen("rsmi_dev_perf_level")) == 0) {
1751 if (rsmi_dev_perf_level_count[dev] == 0) {
1752 rsmi_dev_perf_level_count[dev] = *events_count;
1753 return ROCS_EVENT_TYPE__NORMAL;
1754 }
1755
1756 if (strcmp(v_name, "rsmi_dev_perf_level_set") == 0) {
1757 /* Set overwrites Get, update event description */
1758 papi_free(events[rsmi_dev_perf_level_count[dev]].descr);
1759 events[rsmi_dev_perf_level_count[dev]].descr = get_event_descr(v_name, -1, -1);
1760 events[rsmi_dev_perf_level_count[dev]].mode = ROCS_ACCESS_MODE__RDWR;
1761 }
1762
1763 return ROCS_EVENT_TYPE__SPECIAL;
1764 }
1765
1766 return ROCS_EVENT_TYPE__NORMAL;
1767}
1768
1769int
1770handle_xgmi_events(int32_t dev, int *events_count, ntv_event_t *events)
1771{
1772 int i;
1773 rsmi_status_t status;
1774
1775 status = rsmi_dev_counter_group_supported_p(dev, RSMI_EVNT_GRP_XGMI);
1776 if (status == RSMI_STATUS_SUCCESS) {
1777 for (i = RSMI_EVNT_XGMI_FIRST; i <= RSMI_EVNT_XGMI_LAST; ++i) {
1778 events[*events_count].id = *events_count;
1779 events[*events_count].name = get_event_name("rsmi_dev_xgmi_evt_get", dev, i, -1);
1780 events[*events_count].descr = get_event_descr("rsmi_dev_xgmi_evt_get", i, -1);
1781 events[*events_count].device = dev;
1782 events[*events_count].variant = i;
1783 events[*events_count].subvariant = -1;
1784 events[*events_count].mode = ROCS_ACCESS_MODE__READ;
1785 events[*events_count].open_func_p = get_open_func("rsmi_dev_xgmi_evt_get");
1786 events[*events_count].close_func_p = get_close_func("rsmi_dev_xgmi_evt_get");
1787 events[*events_count].start_func_p = get_start_func("rsmi_dev_xgmi_evt_get");
1788 events[*events_count].stop_func_p = get_stop_func("rsmi_dev_xgmi_evt_get");
1789 events[*events_count].access_func_p = get_access_func("rsmi_dev_xgmi_evt_get");
1790 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1791 ++(*events_count);
1792 }
1793 }
1794
1795 status = rsmi_dev_counter_group_supported_p(dev, RSMI_EVNT_GRP_XGMI_DATA_OUT);
1796 if (status == RSMI_STATUS_SUCCESS) {
1797 for (i = RSMI_EVNT_XGMI_DATA_OUT_FIRST; i <= RSMI_EVNT_XGMI_DATA_OUT_LAST; ++i) {
1798 events[*events_count].id = *events_count;
1799 events[*events_count].name = get_event_name("rsmi_dev_xgmi_evt_get", dev, i, -1);
1800 events[*events_count].descr = get_event_descr("rsmi_dev_xgmi_evt_get", i, -1);
1801 events[*events_count].device = dev;
1802 events[*events_count].variant = i;
1803 events[*events_count].subvariant = -1;
1804 events[*events_count].mode = ROCS_ACCESS_MODE__READ;
1805 events[*events_count].open_func_p = get_open_func("rsmi_dev_xgmi_evt_get");
1806 events[*events_count].close_func_p = get_close_func("rsmi_dev_xgmi_evt_get");
1807 events[*events_count].start_func_p = get_start_func("rsmi_dev_xgmi_evt_get");
1808 events[*events_count].stop_func_p = get_stop_func("rsmi_dev_xgmi_evt_get");
1809 events[*events_count].access_func_p = get_access_func("rsmi_dev_xgmi_evt_get");
1810 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1811 ++(*events_count);
1812 }
1813 }
1814
1815 int j;
1816 for (i = 0; i < device_count; ++i) {
1817 if (i == dev) {
1818 continue;
1819 }
1820 rsmi_status_t status;
1821 int res = 0;
1822 status = rsmi_is_P2P_accessible_p((uint32_t) i, (uint32_t) dev, &res);
1823 if (status != RSMI_STATUS_SUCCESS) {
1824 break;
1825 }
1826 if (res == 0) {
1827 continue;
1828 }
1829 uint64_t min, max;
1830 status = rsmi_minmax_bandwidth_get_p((uint32_t) dev, (uint32_t) i, &min, &max);
1831 if (status != RSMI_STATUS_SUCCESS) {
1832 break;
1833 }
1834 for (j = 0; j < ROCS_XGMI_BW_VARIANT__NUM; ++j) {
1835 events[*events_count].id = *events_count;
1836 events[*events_count].name = get_event_name("rsmi_dev_xgmi_bw_get", dev, (int64_t) j, (int64_t) i);
1837 events[*events_count].descr = get_event_descr("rsmi_dev_xgmi_bw_get", (int64_t) j, -1);
1838 events[*events_count].device = dev;
1839 events[*events_count].variant = j;
1840 events[*events_count].subvariant = i;
1841 events[*events_count].mode = ROCS_ACCESS_MODE__READ;
1842 events[*events_count].open_func_p = get_open_func("rsmi_dev_xgmi_bw_get");
1843 events[*events_count].close_func_p = get_close_func("rsmi_dev_xgmi_bw_get");
1844 events[*events_count].start_func_p = get_start_func("rsmi_dev_xgmi_bw_get");
1845 events[*events_count].stop_func_p = get_stop_func("rsmi_dev_xgmi_bw_get");
1846 events[*events_count].access_func_p = get_access_func("rsmi_dev_xgmi_bw_get");
1847 htable_insert(htable, events[*events_count].name, &events[*events_count]);
1848 ++(*events_count);
1849 }
1850 }
1851
1852 return PAPI_OK;
1853}
1854
1855char *
1856get_event_name(const char *name, int32_t dev, int64_t variant, int64_t subvariant)
1857{
1858 char event_name_str[PAPI_MAX_STR_LEN] = { 0 };
1859
1860 if (strcmp(name, "rsmi_dev_count") == 0) {
1861 return strdup("NUMDevices");
1862 } else if (strcmp(name, "rsmi_lib_version") == 0) {
1863 return strdup("rsmi_version");
1864 } else if (strcmp(name, "rsmi_dev_driver_version_str_get") == 0) {
1865 return strdup("driver_version_str");
1866 } else if (strcmp(name, "rsmi_dev_id_get") == 0) {
1867 sprintf(event_name_str, "device_id:device=%i", dev);
1868 } else if (strcmp(name, "rsmi_dev_subsystem_vendor_id_get") == 0) {
1869 sprintf(event_name_str, "subsystem_vendor_id:device=%i", dev);
1870 } else if (strcmp(name, "rsmi_dev_vendor_id_get") == 0) {
1871 sprintf(event_name_str, "vendor_id:device=%i", dev);
1872 } else if (strcmp(name, "rsmi_dev_unique_id_get") == 0) {
1873 sprintf(event_name_str, "unique_id:device=%i", dev);
1874 } else if (strcmp(name, "rsmi_dev_subsystem_id_get") == 0) {
1875 sprintf(event_name_str, "subsystem_id:device=%i", dev);
1876 } else if (strcmp(name, "rsmi_dev_drm_render_minor_get") == 0) {
1877 sprintf(event_name_str, "drm_render_minor:device=%i", dev);
1878 } else if (strcmp(name, "rsmi_dev_overdrive_level_get") == 0) {
1879 sprintf(event_name_str, "overdrive_level:device=%i", dev);
1880 } else if (strncmp(name, "rsmi_dev_perf_level", strlen("rsmi_dev_perf_level")) == 0) {
1881 sprintf(event_name_str, "perf_level:device=%i", dev);
1882 } else if (strcmp(name, "rsmi_dev_memory_total_get") == 0) {
1883 switch (variant) {
1884 case RSMI_MEM_TYPE_VRAM:
1885 sprintf(event_name_str, "mem_total_VRAM:device=%i", dev);
1886 break;
1887 case RSMI_MEM_TYPE_VIS_VRAM:
1888 sprintf(event_name_str, "mem_total_VIS_VRAM:device=%i", dev);
1889 break;
1890 case RSMI_MEM_TYPE_GTT:
1891 sprintf(event_name_str, "mem_total_GTT:device=%i", dev);
1892 break;
1893 default:
1894 return NULL;
1895 }
1896 } else if (strcmp(name, "rsmi_dev_memory_usage_get") == 0) {
1897 switch (variant) {
1898 case RSMI_MEM_TYPE_VRAM:
1899 sprintf(event_name_str, "mem_usage_VRAM:device=%i", dev);
1900 break;
1901 case RSMI_MEM_TYPE_VIS_VRAM:
1902 sprintf(event_name_str, "mem_usage_VIS_VRAM:device=%i", dev);
1903 break;
1904 case RSMI_MEM_TYPE_GTT:
1905 sprintf(event_name_str, "mem_usage_GTT:device=%i", dev);
1906 break;
1907 default:
1908 return NULL;
1909 }
1910 } else if (strcmp(name, "rsmi_dev_busy_percent_get") == 0) {
1911 sprintf(event_name_str, "busy_percent:device=%i", dev);
1912 } else if (strcmp(name, "rsmi_dev_memory_busy_percent_get") == 0) {
1913 sprintf(event_name_str, "memory_busy_percent:device=%i", dev);
1914 } else if (strcmp(name, "rsmi_dev_pci_id_get") == 0) {
1915 sprintf(event_name_str, "pci_id:device=%i", dev);
1916 } else if (strcmp(name, "rsmi_dev_pci_replay_counter_get") == 0) {
1917 sprintf(event_name_str, "pci_replay_counter:device=%i", dev);
1918 } else if (strcmp(name, "rsmi_dev_pci_throughput_get") == 0) {
1919 switch (variant) {
1920 case ROCS_PCI_THROUGHPUT_VARIANT__SENT:
1921 sprintf(event_name_str, "pci_throughput_sent:device=%i", dev);
1922 break;
1923 case ROCS_PCI_THROUGHPUT_VARIANT__RECEIVED:
1924 sprintf(event_name_str, "pci_throughput_received:device=%i", dev);
1925 break;
1926 case ROCS_PCI_THROUGHPUT_VARIANT__MAX_PACKET_SIZE:
1927 sprintf(event_name_str, "pci_max_packet_size:device=%i", dev);
1928 break;
1929 default:
1930 return NULL;
1931 }
1932 } else if (strcmp(name, "rsmi_dev_power_profile_presets_get") == 0) {
1933 switch (variant) {
1934 case ROCS_POWER_PRESETS_VARIANT__COUNT:
1935 sprintf(event_name_str, "power_profiler_presets:device=%i:count", dev);
1936 break;
1937 case ROCS_POWER_PRESETS_VARIANT__AVAIL_PROFILES:
1938 sprintf(event_name_str, "power_profiler_presets:device=%i:avail_profiles", dev);
1939 break;
1940 case ROCS_POWER_PRESETS_VARIANT__CURRENT:
1941 sprintf(event_name_str, "power_profiler_presets:device=%i:current", dev);
1942 break;
1943 default:
1944 return NULL;
1945 }
1946 } else if (strcmp(name, "rsmi_dev_power_profile_set") == 0) {
1947 sprintf(event_name_str, "power_profile_set:device=%i", dev);
1948 } else if (strcmp(name, "rsmi_dev_fan_reset") == 0) {
1949 sprintf(event_name_str, "fan_reset:device=%i:sensor=%i", dev, (int) subvariant);
1950 } else if (strcmp(name, "rsmi_dev_fan_rpms_get") == 0) {
1951 sprintf(event_name_str, "fan_rpms:device=%i:sensor=%i", dev, (int) subvariant);
1952 } else if (strcmp(name, "rsmi_dev_fan_speed_max_get") == 0) {
1953 sprintf(event_name_str, "fan_speed_max:device=%i:sensor=%i", dev, (int) subvariant);
1954 } else if (strcmp(name, "rsmi_dev_fan_speed_get") == 0 || strcmp(name, "rsmi_dev_fan_speed_set") == 0) {
1955 sprintf(event_name_str, "fan_speed:device=%i:sensor=%i", dev, (int) subvariant);
1956 } else if (strcmp(name, "rsmi_dev_power_ave_get") == 0) {
1957 sprintf(event_name_str, "power_average:device=%i:sensor=%i", dev, (int) subvariant);
1958 } else if (strcmp(name, "rsmi_dev_power_cap_get") == 0 || strcmp(name, "rsmi_dev_power_cap_set") == 0) {
1959 sprintf(event_name_str, "power_cap:device=%i:sensor=%i", dev, (int) subvariant);
1960 } else if (strcmp(name, "rsmi_dev_power_cap_range_get") == 0) {
1961 switch (variant) {
1962 case ROCS_POWER_CAP_RANGE_VARIANT__MIN:
1963 sprintf(event_name_str, "power_cap_range_min:device=%i:sensor=%i", dev, (int) subvariant);
1964 break;
1965 case ROCS_POWER_CAP_RANGE_VARIANT__MAX:
1966 sprintf(event_name_str, "power_cap_range_max:device=%i:sensor=%i", dev, (int) subvariant);
1967 break;
1968 default:
1969 return NULL;
1970 }
1971 } else if (strcmp(name, "rsmi_dev_temp_metric_get") == 0) {
1972 switch (variant) {
1973 case RSMI_TEMP_CURRENT:
1974 sprintf(event_name_str, "temp_current:device=%i:sensor=%i", dev, (int) subvariant);
1975 break;
1976 case RSMI_TEMP_MAX:
1977 sprintf(event_name_str, "temp_max:device=%i:sensor=%i", dev, (int) subvariant);
1978 break;
1979 case RSMI_TEMP_MIN:
1980 sprintf(event_name_str, "temp_min:device=%i:sensor=%i", dev, (int) subvariant);
1981 break;
1982 case RSMI_TEMP_MAX_HYST:
1983 sprintf(event_name_str, "temp_max_hyst:device=%i:sensor=%i", dev, (int) subvariant);
1984 break;
1985 case RSMI_TEMP_MIN_HYST:
1986 sprintf(event_name_str, "temp_min_hyst:device=%i:sensor=%i", dev, (int) subvariant);
1987 break;
1988 case RSMI_TEMP_CRITICAL:
1989 sprintf(event_name_str, "temp_critical:device=%i:sensor=%i", dev, (int) subvariant);
1990 break;
1991 case RSMI_TEMP_CRITICAL_HYST:
1992 sprintf(event_name_str, "temp_critical_hyst:device=%i:sensor=%i", dev, (int) subvariant);
1993 break;
1994 case RSMI_TEMP_EMERGENCY:
1995 sprintf(event_name_str, "temp_emergency:device=%i:sensor=%i", dev, (int) subvariant);
1996 break;
1997 case RSMI_TEMP_EMERGENCY_HYST:
1998 sprintf(event_name_str, "temp_emergency_hyst:device=%i:sensor=%i", dev, (int) subvariant);
1999 break;
2000 case RSMI_TEMP_CRIT_MIN:
2001 sprintf(event_name_str, "temp_crit_min:device=%i:sensor=%i", dev, (int) subvariant);
2002 break;
2003 case RSMI_TEMP_CRIT_MIN_HYST:
2004 sprintf(event_name_str, "temp_crit_min_hyst:device=%i:sensor=%i", dev, (int) subvariant);
2005 break;
2006 case RSMI_TEMP_OFFSET:
2007 sprintf(event_name_str, "temp_offset:device=%i:sensor=%i", dev, (int) subvariant);
2008 break;
2009 case RSMI_TEMP_LOWEST:
2010 sprintf(event_name_str, "temp_lowest:device=%i:sensor=%i", dev, (int) subvariant);
2011 break;
2012 case RSMI_TEMP_HIGHEST:
2013 sprintf(event_name_str, "temp_highest:device=%i:sensor=%i", dev, (int) subvariant);
2014 break;
2015 default:
2016 return NULL;
2017 }
2018 } else if (strcmp(name, "rsmi_dev_firmware_version_get") == 0) {
2019 switch (variant) {
2020 case RSMI_FW_BLOCK_ASD:
2021 sprintf(event_name_str, "firmware_version:device=%i:block=ASD", dev);
2022 break;
2023 case RSMI_FW_BLOCK_CE:
2024 sprintf(event_name_str, "firmware_version:device=%i:block=CE", dev);
2025 break;
2026 case RSMI_FW_BLOCK_DMCU:
2027 sprintf(event_name_str, "firmware_version:device=%i:block=DMCU", dev);
2028 break;
2029 case RSMI_FW_BLOCK_MC:
2030 sprintf(event_name_str, "firmware_version:device=%i:block=MC", dev);
2031 break;
2032 case RSMI_FW_BLOCK_ME:
2033 sprintf(event_name_str, "firmware_version:device=%i:block=ME", dev);
2034 break;
2035 case RSMI_FW_BLOCK_MEC:
2036 sprintf(event_name_str, "firmware_version:device=%i:block=MEC", dev);
2037 break;
2038 case RSMI_FW_BLOCK_MEC2:
2039 sprintf(event_name_str, "firmware_version:device=%i:block=MEC2", dev);
2040 break;
2041 case RSMI_FW_BLOCK_PFP:
2042 sprintf(event_name_str, "firmware_version:device=%i:block=PFP", dev);
2043 break;
2044 case RSMI_FW_BLOCK_RLC:
2045 sprintf(event_name_str, "firmware_version:device=%i:block=RLC", dev);
2046 break;
2047 case RSMI_FW_BLOCK_RLC_SRLC:
2048 sprintf(event_name_str, "firmware_version:device=%i:block=SRLC", dev);
2049 break;
2050 case RSMI_FW_BLOCK_RLC_SRLG:
2051 sprintf(event_name_str, "firmware_version:device=%i:block=SRLG", dev);
2052 break;
2053 case RSMI_FW_BLOCK_RLC_SRLS:
2054 sprintf(event_name_str, "firmware_version:device=%i:block=SRLS", dev);
2055 break;
2056 case RSMI_FW_BLOCK_SDMA:
2057 sprintf(event_name_str, "firmware_version:device=%i:block=SDMA", dev);
2058 break;
2059 case RSMI_FW_BLOCK_SDMA2:
2060 sprintf(event_name_str, "firmware_version:device=%i:block=SDMA2", dev);
2061 break;
2062 case RSMI_FW_BLOCK_SMC:
2063 sprintf(event_name_str, "firmware_version:device=%i:block=SMC", dev);
2064 break;
2065 case RSMI_FW_BLOCK_SOS:
2066 sprintf(event_name_str, "firmware_version:device=%i:block=SOS", dev);
2067 break;
2068 case RSMI_FW_BLOCK_TA_RAS:
2069 sprintf(event_name_str, "firmware_version:device=%i:block=RAS", dev);
2070 break;
2071 case RSMI_FW_BLOCK_TA_XGMI:
2072 sprintf(event_name_str, "firmware_version:device=%i:block=XGMI", dev);
2073 break;
2074 case RSMI_FW_BLOCK_UVD:
2075 sprintf(event_name_str, "firmware_version:device=%i:block=UVD", dev);
2076 break;
2077 case RSMI_FW_BLOCK_VCE:
2078 sprintf(event_name_str, "firmware_version:device=%i:block=VCE", dev);
2079 break;
2080 case RSMI_FW_BLOCK_VCN:
2081 sprintf(event_name_str, "firmware_version:device=%i:block=VCN", dev);
2082 break;
2083 default:
2084 return NULL;
2085 }
2086 } else if (strcmp(name, "rsmi_dev_ecc_count_get") == 0) {
2087 const char *block = NULL;
2088 switch (variant) {
2089 case RSMI_GPU_BLOCK_UMC:
2090 block = "UMC";
2091 break;
2092 case RSMI_GPU_BLOCK_SDMA:
2093 block = "SDMA";
2094 break;
2095 case RSMI_GPU_BLOCK_GFX:
2096 block = "GFX";
2097 break;
2098 case RSMI_GPU_BLOCK_MMHUB:
2099 block = "MMHUB";
2100 break;
2101 case RSMI_GPU_BLOCK_ATHUB:
2102 block = "ATHUB";
2103 break;
2104 case RSMI_GPU_BLOCK_PCIE_BIF:
2105 block = "PCIE_BIF";
2106 break;
2107 case RSMI_GPU_BLOCK_HDP:
2108 block = "HDP";
2109 break;
2110 case RSMI_GPU_BLOCK_XGMI_WAFL:
2111 block = "XGMI_WAFL";
2112 break;
2113 case RSMI_GPU_BLOCK_DF:
2114 block = "DF";
2115 break;
2116 case RSMI_GPU_BLOCK_SMN:
2117 block = "SMN";
2118 break;
2119 case RSMI_GPU_BLOCK_SEM:
2120 block = "SEM";
2121 break;
2122 case RSMI_GPU_BLOCK_MP0:
2123 block = "MP0";
2124 break;
2125 case RSMI_GPU_BLOCK_MP1:
2126 block = "MP1";
2127 break;
2128 case RSMI_GPU_BLOCK_FUSE:
2129 block = "FUSE";
2130 break;
2131 default:
2132 return NULL;
2133 }
2134
2135 switch (subvariant) {
2136 case ROCS_ECC_COUNT_SUBVARIANT__CORRECTABLE:
2137 sprintf(event_name_str, "ecc_count_correctable:device=%i:block=%s", dev, block);
2138 break;
2139 case ROCS_ECC_COUNT_SUBVARIANT__UNCORRECTABLE:
2140 sprintf(event_name_str, "ecc_count_uncorrectable:device=%i:block=%s", dev, block);
2141 break;
2142 default:
2143 return NULL;
2144 }
2145 } else if (strcmp(name, "rsmi_dev_ecc_enabled_get") == 0) {
2146 sprintf(event_name_str, "ecc_enabled_get:device=%i", dev);
2147 } else if (strcmp(name, "rsmi_dev_ecc_status_get") == 0) {
2148 const char *block = NULL;
2149 switch (variant) {
2150 case RSMI_GPU_BLOCK_UMC:
2151 block = "UMC";
2152 break;
2153 case RSMI_GPU_BLOCK_SDMA:
2154 block = "SDMA";
2155 break;
2156 case RSMI_GPU_BLOCK_GFX:
2157 block = "GFX";
2158 break;
2159 case RSMI_GPU_BLOCK_MMHUB:
2160 block = "MMHUB";
2161 break;
2162 case RSMI_GPU_BLOCK_ATHUB:
2163 block = "ATHUB";
2164 break;
2165 case RSMI_GPU_BLOCK_PCIE_BIF:
2166 block = "PCIE_BIF";
2167 break;
2168 case RSMI_GPU_BLOCK_HDP:
2169 block = "HDP";
2170 break;
2171 case RSMI_GPU_BLOCK_XGMI_WAFL:
2172 block = "XGMI_WAFL";
2173 break;
2174 case RSMI_GPU_BLOCK_DF:
2175 block = "DF";
2176 break;
2177 case RSMI_GPU_BLOCK_SMN:
2178 block = "SMN";
2179 break;
2180 case RSMI_GPU_BLOCK_SEM:
2181 block = "SEM";
2182 break;
2183 case RSMI_GPU_BLOCK_MP0:
2184 block = "MP0";
2185 break;
2186 case RSMI_GPU_BLOCK_MP1:
2187 block = "MP1";
2188 break;
2189 case RSMI_GPU_BLOCK_FUSE:
2190 block = "FUSE";
2191 break;
2192 default:
2193 return NULL;
2194 }
2195 sprintf(event_name_str, "ecc_status:device=%i:block=%s", dev, block);
2196 } else if (strcmp(name, "rsmi_dev_gpu_clk_freq_get") == 0) {
2197 const char *variant_str = NULL;
2198 switch (variant) {
2199 case ROCS_GPU_CLK_FREQ_VARIANT__SYSTEM:
2200 variant_str = "System";
2201 break;
2202 case ROCS_GPU_CLK_FREQ_VARIANT__DATA_FABRIC:
2203 variant_str = "DataFabric";
2204 break;
2205 case ROCS_GPU_CLK_FREQ_VARIANT__DISPLAY_ENGINE:
2206 variant_str = "DisplayEngine";
2207 break;
2208 case ROCS_GPU_CLK_FREQ_VARIANT__SOC:
2209 variant_str = "SOC";
2210 break;
2211 case ROCS_GPU_CLK_FREQ_VARIANT__MEMORY:
2212 variant_str = "Memory";
2213 break;
2214 default:
2215 return NULL;
2216 }
2217
2218 int idx;
2219 const char *subvariant_str = NULL;
2220 switch (subvariant) {
2221 case ROCS_GPU_CLK_FREQ_SUBVARIANT__COUNT:
2222 subvariant_str = "count";
2223 break;
2224 case ROCS_GPU_CLK_FREQ_SUBVARIANT__CURRENT:
2225 subvariant_str = "current";
2226 break;
2227 default:
2228 idx = subvariant - ROCS_GPU_CLK_FREQ_SUBVARIANT__NUM;
2229 }
2230
2231 if (subvariant <= ROCS_GPU_CLK_FREQ_SUBVARIANT__CURRENT) {
2232 sprintf(event_name_str, "gpu_clk_freq_%s:device=%i:%s", variant_str, dev, subvariant_str);
2233 } else {
2234 sprintf(event_name_str, "gpu_clk_freq_%s:device=%i:idx=%i", variant_str, dev, idx);
2235 }
2236 } else if (strcmp(name, "rsmi_dev_gpu_clk_freq_set") == 0) {
2237 const char *variant_str = NULL;
2238 switch (variant) {
2239 case ROCS_GPU_CLK_FREQ_VARIANT__SYSTEM:
2240 variant_str = "System";
2241 break;
2242 case ROCS_GPU_CLK_FREQ_VARIANT__DATA_FABRIC:
2243 variant_str = "DataFabric";
2244 break;
2245 case ROCS_GPU_CLK_FREQ_VARIANT__DISPLAY_ENGINE:
2246 variant_str = "DisplayEngine";
2247 break;
2248 case ROCS_GPU_CLK_FREQ_VARIANT__SOC:
2249 variant_str = "SOC";
2250 break;
2251 case ROCS_GPU_CLK_FREQ_VARIANT__MEMORY:
2252 variant_str = "Memory";
2253 break;
2254 default:
2255 return NULL;
2256 }
2257
2258 sprintf(event_name_str, "gpu_clk_freq_%s:device=%i:mask", variant_str, dev);
2259 } else if (strcmp(name, "rsmi_dev_pci_bandwidth_get") == 0) {
2260 const char *variant_str = NULL;
2261 switch (variant) {
2262 case ROCS_PCI_BW_VARIANT__COUNT:
2263 variant_str = "count";
2264 break;
2265 case ROCS_PCI_BW_VARIANT__CURRENT:
2266 variant_str = "current";
2267 break;
2268 case ROCS_PCI_BW_VARIANT__RATE_IDX:
2269 variant_str = "rate_idx";
2270 break;
2271 case ROCS_PCI_BW_VARIANT__LANE_IDX:
2272 variant_str = "lane_idx";
2273 break;
2274 default:
2275 return NULL;
2276 }
2277
2278 if (variant <= ROCS_PCI_BW_VARIANT__CURRENT) {
2279 sprintf(event_name_str, "pci_bandwidth_rate:device=%i:%s", dev, variant_str);
2280 } else {
2281 sprintf(event_name_str, "pci_bandwidth_rate:device=%i:%s=%i", dev, variant_str, (int) subvariant);
2282 }
2283 } else if (strcmp(name, "rsmi_dev_pci_bandwidth_set") == 0) {
2284 sprintf(event_name_str, "pci_bandwidth_rate:device=%i:mask", dev);
2285 } else if (strcmp(name, "rsmi_dev_brand_get") == 0) {
2286 sprintf(event_name_str, "device_brand:device=%i", dev);
2287 } else if (strcmp(name, "rsmi_dev_name_get") == 0) {
2288 sprintf(event_name_str, "device_name:device=%i", dev);
2289 } else if (strcmp(name, "rsmi_dev_serial_number_get") == 0) {
2290 sprintf(event_name_str, "device_serial_number:device=%i", dev);
2291 } else if (strcmp(name, "rsmi_dev_subsystem_name_get") == 0) {
2292 sprintf(event_name_str, "device_subsystem_name:device=%i", dev);
2293 } else if (strcmp(name, "rsmi_dev_vbios_version_get") == 0) {
2294 sprintf(event_name_str, "vbios_version:device=%i", dev);
2295 } else if (strcmp(name, "rsmi_dev_vendor_name_get") == 0) {
2296 sprintf(event_name_str, "vendor_name:device=%i", dev);
2297 } else if (strcmp(name, "rsmi_dev_xgmi_evt_get") == 0) {
2298 const char *variant_str = NULL;
2299 switch (variant) {
2300 case ROCS_XGMI_VARIANT__MI50_0_NOP_TX:
2301 variant_str = "nop_sent_to_neighbor0";
2302 break;
2303 case ROCS_XGMI_VARIANT__MI50_0_REQUEST_TX:
2304 variant_str = "req_sent_to_neighbor0";
2305 break;
2306 case ROCS_XGMI_VARIANT__MI50_0_RESPONSE_TX:
2307 variant_str = "res_sent_to_neighbor0";
2308 break;
2309 case ROCS_XGMI_VARIANT__MI50_0_BEATS_TX:
2310 variant_str = "data_beats_sent_to_neighbor0";
2311 break;
2312 case ROCS_XGMI_VARIANT__MI50_1_NOP_TX:
2313 variant_str = "nop_sent_to_neighbor1";
2314 break;
2315 case ROCS_XGMI_VARIANT__MI50_1_REQUEST_TX:
2316 variant_str = "req_sent_to_neighbor1";
2317 break;
2318 case ROCS_XGMI_VARIANT__MI50_1_RESPONSE_TX:
2319 variant_str = "res_sent_to_neighbor1";
2320 break;
2321 case ROCS_XGMI_VARIANT__MI50_1_BEATS_TX:
2322 variant_str = "data_beats_sent_to_neighbor1";
2323 break;
2324 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_0:
2325 variant_str = "data_beats_sent_to_neighbor0";
2326 break;
2327 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_1:
2328 variant_str = "data_beats_sent_to_neighbor1";
2329 break;
2330 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_2:
2331 variant_str = "data_beats_sent_to_neighbor2";
2332 break;
2333 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_3:
2334 variant_str = "data_beats_sent_to_neighbor3";
2335 break;
2336 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_4:
2337 variant_str = "data_beats_sent_to_neighbor4";
2338 break;
2339 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_5:
2340 variant_str = "data_beats_sent_to_neighbor5";
2341 break;
2342 default:
2343 return NULL;
2344 }
2345 sprintf(event_name_str, "xgmi_%s:device=%i", variant_str, dev);
2346 } else if (strcmp(name, "rsmi_dev_xgmi_bw_get") == 0) {
2347 switch (variant) {
2348 case ROCS_XGMI_BW_VARIANT__MIN:
2349 sprintf(event_name_str, "min_xgmi_internode_bw:device=%i:target=%i", dev, (int) subvariant);
2350 break;
2351 case ROCS_XGMI_BW_VARIANT__MAX:
2352 sprintf(event_name_str, "max_xgmi_internode_bw:device=%i:target=%i", dev, (int) subvariant);
2353 break;
2354 default:
2355 return NULL;
2356 }
2357 } else {
2358 return NULL;
2359 }
2360
2361 return strdup(event_name_str);
2362}
2363
2364char *
2365get_event_descr(const char *name, int64_t variant, int64_t subvariant)
2366{
2367 char event_descr_str[PAPI_MAX_STR_LEN] = { 0 };
2368
2369 if (strcmp(name, "rsmi_dev_count") == 0) {
2370 return strdup("Number of Devices which have monitors, accessible by rocm_smi.");
2371 } else if (strcmp(name, "rsmi_lib_version") == 0) {
2372 return strdup("Version of RSMI lib; 0x0000MMMMmmmmpppp Major, Minor, Patch.");
2373 } else if (strcmp(name, "rsmi_dev_driver_version_str_get") == 0) {
2374 return strdup("Returns char* to z-terminated driver version string; do not free().");
2375 } else if (strcmp(name, "rsmi_dev_id_get") == 0) {
2376 return strdup("Vendor supplied device id number. May be shared by same model devices; see pci_id for a unique identifier.");
2377 } else if (strcmp(name, "rsmi_dev_subsystem_vendor_id_get") == 0) {
2378 return strdup("System vendor id number.");
2379 } else if (strcmp(name, "rsmi_dev_vendor_id_get") == 0) {
2380 return strdup("Vendor id number.");
2381 } else if (strcmp(name, "rsmi_dev_unique_id_get") == 0) {
2382 return strdup("Unique id for device.");
2383 } else if (strcmp(name, "rsmi_dev_subsystem_id_get") == 0) {
2384 return strdup("Subsystem id number.");
2385 } else if (strcmp(name, "rsmi_dev_drm_render_minor_get") == 0) {
2386 return strdup("DRM Minor Number associated with this device.");
2387 } else if (strcmp(name, "rsmi_dev_overdrive_level_get") == 0) {
2388 return strdup("Overdriver Level \% for device, 0 to 20, max overclocked permitted. Read Only.");
2389 } else if (strcmp(name, "rsmi_dev_perf_level_get") == 0) {
2390 sprintf(event_descr_str, "PowerPlay Performance Level; Read Only, enum rsmi_dev_perf_level_t [0-%i], see ROCm_SMI_Manual for details.",
2391 RSMI_DEV_PERF_LEVEL_LAST);
2392 } else if (strcmp(name, "rsmi_dev_perf_level_set") == 0) {
2393 sprintf(event_descr_str, "PowerPlay Performance Level; Read/Write, enum rsmi_dev_perf_level_t [0-%i], see ROCm_SMI_Manual for details.",
2394 RSMI_DEV_PERF_LEVEL_LAST);
2395 } else if (strcmp(name, "rsmi_dev_memory_total_get") == 0) {
2396 switch (variant) {
2397 case RSMI_MEM_TYPE_VRAM:
2398 sprintf(event_descr_str, "Total VRAM memory.");
2399 break;
2400 case RSMI_MEM_TYPE_VIS_VRAM:
2401 sprintf(event_descr_str, "Total Visible VRAM memory.");
2402 break;
2403 case RSMI_MEM_TYPE_GTT:
2404 sprintf(event_descr_str, "Total Visible GTT (Graphics Translation Table) memory, aka GART memory.");
2405 break;
2406 default:
2407 return NULL;
2408 }
2409 } else if (strcmp(name, "rsmi_dev_memory_usage_get") == 0) {
2410 switch (variant) {
2411 case RSMI_MEM_TYPE_VRAM:
2412 sprintf(event_descr_str, "VRAM memory in use.");
2413 break;
2414 case RSMI_MEM_TYPE_VIS_VRAM:
2415 sprintf(event_descr_str, "Visible VRAM memory in use.");
2416 break;
2417 case RSMI_MEM_TYPE_GTT:
2418 sprintf(event_descr_str, "(Graphic Translation Table) memory in use (aka GART memory).");
2419 break;
2420 default:
2421 return NULL;
2422 }
2423 } else if (strcmp(name, "rsmi_dev_busy_percent_get") == 0) {
2424 return strdup("Percentage of time the device was busy doing any processing.");
2425 } else if (strcmp(name, "rsmi_dev_memory_busy_percent_get") == 0) {
2426 return strdup("Percentage_of time any device memory is being used.");
2427 } else if (strcmp(name, "rsmi_dev_pci_id_get") == 0) {
2428 return strdup("BDF (Bus/Device/Function) ID, unique per device.");
2429 } else if (strcmp(name, "rsmi_dev_pci_replay_counter_get") == 0) {
2430 return strdup("Sum of the number of NAK's received by the GPU and the NAK's generated by the GPU.");
2431 } else if (strcmp(name, "rsmi_dev_pci_throughput_get") == 0) {
2432 switch (variant) {
2433 case ROCS_PCI_THROUGHPUT_VARIANT__SENT:
2434 return strdup("Throughput on PCIe traffic, bytes/second sent.");
2435 case ROCS_PCI_THROUGHPUT_VARIANT__RECEIVED:
2436 return strdup("Throughput on PCIe traffic, bytes/second received.");
2437 case ROCS_PCI_THROUGHPUT_VARIANT__MAX_PACKET_SIZE:
2438 return strdup("Maximum PCIe packet size.");
2439 default:
2440 return NULL;
2441 }
2442 } else if (strcmp(name, "rsmi_dev_power_profile_presets_get") == 0) {
2443 switch (variant) {
2444 case ROCS_POWER_PRESETS_VARIANT__COUNT:
2445 return strdup("Number of power profile presets available. See ROCM_SMI Manual for details.");
2446 case ROCS_POWER_PRESETS_VARIANT__AVAIL_PROFILES:
2447 return strdup("Bit mask for available power profile presets. See ROCM_SMI Manual for details.");
2448 case ROCS_POWER_PRESETS_VARIANT__CURRENT:
2449 return strdup("Bit mask for current power profile preset. Read/Write. See ROCM_SMI Manual for details.");
2450 default:
2451 return NULL;
2452 }
2453 } else if (strcmp(name, "rsmi_dev_power_profile_set") == 0) {
2454 return strdup("Write Only, set the power profile to one of the available masks. See ROCM_SMI Manual for details.");
2455 } else if (strcmp(name, "rsmi_dev_fan_reset") == 0) {
2456 return strdup("Fan Reset. Write Only, data value is ignored.");
2457 } else if (strcmp(name, "rsmi_dev_fan_rpms_get") == 0) {
2458 return strdup("Current fan speed in RPMs (Rotations Per Minute).");
2459 } else if (strcmp(name, "rsmi_dev_fan_speed_max_get") == 0) {
2460 return strdup("Maximum possible fan speed in RPMs (Rotations Per Minute).");
2461 } else if (strcmp(name, "rsmi_dev_fan_speed_get") == 0) {
2462 return strdup("Current fan speed in RPMs (Rotations Per Minute), Read Only, result [0-255].");
2463 } else if (strcmp(name, "rsmi_dev_fan_speed_set") == 0) {
2464 return strdup("Current fan speed in RPMs (Rotations Per Minute), Read/Write, Write must be <= MAX (see fan_speed_max event), arg in [0-255].");
2465 } else if (strcmp(name, "rsmi_dev_power_ave_get") == 0) {
2466 return strdup("Current Average Power consumption in microwatts. Requires root privileges.");
2467 } else if (strcmp(name, "rsmi_dev_power_cap_get") == 0) {
2468 return strdup("Power cap in microwatts. Read Only. Between min/max (see power_cap_range_min/max). May require root privileges.");
2469 } else if (strcmp(name, "rsmi_dev_power_cap_set") == 0) {
2470 return strdup("Power cap in microwatts. Read/Write. Between min/max (see power_cap_range_min/max). May require root privileges.");
2471 } else if (strcmp(name, "rsmi_dev_power_cap_range_get") == 0) {
2472 switch (variant) {
2473 case ROCS_POWER_CAP_RANGE_VARIANT__MIN:
2474 return strdup("Power cap Minimum settable value, in microwatts.");
2475 case ROCS_POWER_CAP_RANGE_VARIANT__MAX:
2476 return strdup("Power cap Maximim settable value, in microwatts.");
2477 default:
2478 return NULL;
2479 }
2480 } else if (strcmp(name, "rsmi_dev_temp_metric_get") == 0) {
2481 switch (variant) {
2482 case RSMI_TEMP_CURRENT:
2483 return strdup("Temperature current value, millidegrees Celsius.");
2484 case RSMI_TEMP_MAX:
2485 return strdup("Temperature maximum value, millidegrees Celsius.");
2486 case RSMI_TEMP_MIN:
2487 return strdup("Temperature minimum value, millidegrees Celsius.");
2488 case RSMI_TEMP_MAX_HYST:
2489 return strdup("Temperature hysteresis value for max limit, millidegrees Celsius.");
2490 case RSMI_TEMP_MIN_HYST:
2491 return strdup("Temperature hysteresis value for min limit, millidegrees Celsius.");
2492 case RSMI_TEMP_CRITICAL:
2493 return strdup("Temperature critical max value, typical > temp_max, millidegrees Celsius.");
2494 case RSMI_TEMP_CRITICAL_HYST:
2495 return strdup("Temperature hysteresis value for critical limit, millidegrees Celsius.");
2496 case RSMI_TEMP_EMERGENCY:
2497 return strdup("Temperature emergency max for chips supporting more than two upper temp limits, millidegrees Celsius.");
2498 case RSMI_TEMP_EMERGENCY_HYST:
2499 return strdup("Temperature hysteresis value for emergency limit, millidegrees Celsius.");
2500 case RSMI_TEMP_CRIT_MIN:
2501 return strdup("Temperature critical min value, typical < temp_min, millidegrees Celsius.");
2502 case RSMI_TEMP_CRIT_MIN_HYST:
2503 return strdup("Temperature hysteresis value for critical min limit, millidegrees Celsius.");
2504 case RSMI_TEMP_OFFSET:
2505 return strdup("Temperature offset added to temp reading by the chip, millidegrees Celsius.");
2506 case RSMI_TEMP_LOWEST:
2507 return strdup("Temperature historical minimum, millidegrees Celsius.");
2508 case RSMI_TEMP_HIGHEST:
2509 return strdup("Temperature historical maximum, millidegrees Celsius.");
2510 default:
2511 return NULL;
2512 }
2513 } else if (strcmp(name, "rsmi_dev_firmware_version_get") == 0) {
2514 switch (variant) {
2515 case RSMI_FW_BLOCK_ASD:
2516 return strdup("Firmware Version Block ASD.");
2517 case RSMI_FW_BLOCK_CE:
2518 return strdup("Firmware Version Block CE.");
2519 case RSMI_FW_BLOCK_DMCU:
2520 return strdup("Firmware Version Block DMCU.");
2521 case RSMI_FW_BLOCK_MC:
2522 return strdup("Firmware Version Block MC.");
2523 case RSMI_FW_BLOCK_ME:
2524 return strdup("Firmware Version Block ME.");
2525 case RSMI_FW_BLOCK_MEC:
2526 return strdup("Firmware Version Block MEC.");
2527 case RSMI_FW_BLOCK_MEC2:
2528 return strdup("Firmware Version Block MEC2.");
2529 case RSMI_FW_BLOCK_PFP:
2530 return strdup("Firmware Version Block PFP.");
2531 case RSMI_FW_BLOCK_RLC:
2532 return strdup("Firmware Version Block RLC.");
2533 case RSMI_FW_BLOCK_RLC_SRLC:
2534 return strdup("Firmware Version Block SRLC.");
2535 case RSMI_FW_BLOCK_RLC_SRLG:
2536 return strdup("Firmware Version Block SRLG.");
2537 case RSMI_FW_BLOCK_RLC_SRLS:
2538 return strdup("Firmware Version Block SRLS.");
2539 case RSMI_FW_BLOCK_SDMA:
2540 return strdup("Firmware Version Block SDMA.");
2541 case RSMI_FW_BLOCK_SDMA2:
2542 return strdup("Firmware Version Block SDMA2.");
2543 case RSMI_FW_BLOCK_SMC:
2544 return strdup("Firmware Version Block SMC.");
2545 case RSMI_FW_BLOCK_SOS:
2546 return strdup("Firmware Version Block SOS.");
2547 case RSMI_FW_BLOCK_TA_RAS:
2548 return strdup("Firmware Version Block RAS.");
2549 case RSMI_FW_BLOCK_TA_XGMI:
2550 return strdup("Firmware Version Block XGMI.");
2551 case RSMI_FW_BLOCK_UVD:
2552 return strdup("Firmware Version Block UVD.");
2553 case RSMI_FW_BLOCK_VCE:
2554 return strdup("Firmware Version Block VCE.");
2555 case RSMI_FW_BLOCK_VCN:
2556 return strdup("Firmware Version Block VCN.");
2557 default:
2558 return NULL;
2559 }
2560 } else if (strcmp(name, "rsmi_dev_ecc_count_get") == 0) {
2561 const char *block = NULL;
2562 switch (variant) {
2563 case RSMI_GPU_BLOCK_UMC:
2564 block = "UMC";
2565 break;
2566 case RSMI_GPU_BLOCK_SDMA:
2567 block = "SDMA";
2568 break;
2569 case RSMI_GPU_BLOCK_GFX:
2570 block = "GFX";
2571 break;
2572 case RSMI_GPU_BLOCK_MMHUB:
2573 block = "MMHUB";
2574 break;
2575 case RSMI_GPU_BLOCK_ATHUB:
2576 block = "ATHUB";
2577 break;
2578 case RSMI_GPU_BLOCK_PCIE_BIF:
2579 block = "PCIE_BIF";
2580 break;
2581 case RSMI_GPU_BLOCK_HDP:
2582 block = "HDP";
2583 break;
2584 case RSMI_GPU_BLOCK_XGMI_WAFL:
2585 block = "XGMI_WAFL";
2586 break;
2587 case RSMI_GPU_BLOCK_DF:
2588 block = "DF";
2589 break;
2590 case RSMI_GPU_BLOCK_SMN:
2591 block = "SMN";
2592 break;
2593 case RSMI_GPU_BLOCK_SEM:
2594 block = "SEM";
2595 break;
2596 case RSMI_GPU_BLOCK_MP0:
2597 block = "MP0";
2598 break;
2599 case RSMI_GPU_BLOCK_MP1:
2600 block = "MP1";
2601 break;
2602 case RSMI_GPU_BLOCK_FUSE:
2603 block = "FUSE";
2604 break;
2605 default:
2606 return NULL;
2607 }
2608
2609 switch (subvariant) {
2610 case ROCS_ECC_COUNT_SUBVARIANT__CORRECTABLE:
2611 sprintf(event_descr_str, "Correctable error count for the GPU Block %s.", block);
2612 break;
2613 case ROCS_ECC_COUNT_SUBVARIANT__UNCORRECTABLE:
2614 sprintf(event_descr_str, "Uncorrectable error count for the GPU Block %s.", block);
2615 break;
2616 default:
2617 return NULL;
2618 }
2619 } else if (strcmp(name, "rsmi_dev_ecc_enabled_get") == 0) {
2620 return strdup("Bit mask of GPU blocks with ecc error counting enabled.");
2621 } else if (strcmp(name, "rsmi_dev_ecc_status_get") == 0) {
2622 switch (variant) {
2623 case RSMI_GPU_BLOCK_UMC:
2624 return strdup("ECC Error Status for the GPU Block UMC.");
2625 case RSMI_GPU_BLOCK_SDMA:
2626 return strdup("ECC Error Status for the GPU Block SDMA.");
2627 case RSMI_GPU_BLOCK_GFX:
2628 return strdup("ECC Error Status for the GPU Block GFX.");
2629 case RSMI_GPU_BLOCK_MMHUB:
2630 return strdup("ECC Error Status for the GPU Block MMHUB.");
2631 case RSMI_GPU_BLOCK_ATHUB:
2632 return strdup("ECC Error Status for the GPU Block ATHUB.");
2633 case RSMI_GPU_BLOCK_PCIE_BIF:
2634 return strdup("ECC Error Status for the GPU Block BIF.");
2635 case RSMI_GPU_BLOCK_HDP:
2636 return strdup("ECC Error Status for the GPU Block HDP.");
2637 case RSMI_GPU_BLOCK_XGMI_WAFL:
2638 return strdup("ECC Error Status for the GPU Block WAFL.");
2639 case RSMI_GPU_BLOCK_DF:
2640 return strdup("ECC Error Status for the GPU Block DF.");
2641 case RSMI_GPU_BLOCK_SMN:
2642 return strdup("ECC Error Status for the GPU Block SMN.");
2643 case RSMI_GPU_BLOCK_SEM:
2644 return strdup("ECC Error Status for the GPU Block SEM.");
2645 case RSMI_GPU_BLOCK_MP0:
2646 return strdup("ECC Error Status for the GPU Block MP0.");
2647 case RSMI_GPU_BLOCK_MP1:
2648 return strdup("ECC Error Status for the GPU Block MP1.");
2649 case RSMI_GPU_BLOCK_FUSE:
2650 return strdup("ECC Error Status for the GPU Block FUSE.");
2651 default:
2652 return NULL;
2653 }
2654 } else if (strcmp(name, "rsmi_dev_gpu_clk_freq_get") == 0) {
2655 const char *variant_str = NULL;
2656 switch (variant) {
2657 case ROCS_GPU_CLK_FREQ_VARIANT__SYSTEM:
2658 variant_str = "System";
2659 break;
2660 case ROCS_GPU_CLK_FREQ_VARIANT__DATA_FABRIC:
2661 variant_str = "DataFabric";
2662 break;
2663 case ROCS_GPU_CLK_FREQ_VARIANT__DISPLAY_ENGINE:
2664 variant_str = "DisplayEngine";
2665 break;
2666 case ROCS_GPU_CLK_FREQ_VARIANT__SOC:
2667 variant_str = "SOC";
2668 break;
2669 case ROCS_GPU_CLK_FREQ_VARIANT__MEMORY:
2670 variant_str = "Memory";
2671 break;
2672 default:
2673 return NULL;
2674 }
2675
2676 int idx;
2677 switch (subvariant) {
2678 case ROCS_GPU_CLK_FREQ_SUBVARIANT__COUNT:
2679 return strdup("Number of frequencies available.");
2680 case ROCS_GPU_CLK_FREQ_SUBVARIANT__CURRENT:
2681 return strdup("Current operating frequency.");
2682 default:
2683 idx = subvariant - ROCS_GPU_CLK_FREQ_SUBVARIANT__NUM;
2684 }
2685
2686 sprintf(event_descr_str, "Returns %s frequency value for supported_table[%u].", variant_str, idx);
2687 } else if (strcmp(name, "rsmi_dev_gpu_clk_freq_set") == 0) {
2688 const char *variant_str = NULL;
2689 switch (variant) {
2690 case ROCS_GPU_CLK_FREQ_VARIANT__SYSTEM:
2691 variant_str = "System";
2692 break;
2693 case ROCS_GPU_CLK_FREQ_VARIANT__DATA_FABRIC:
2694 variant_str = "DataFabric";
2695 break;
2696 case ROCS_GPU_CLK_FREQ_VARIANT__DISPLAY_ENGINE:
2697 variant_str = "DisplayEngine";
2698 break;
2699 case ROCS_GPU_CLK_FREQ_VARIANT__SOC:
2700 variant_str = "SOC";
2701 break;
2702 case ROCS_GPU_CLK_FREQ_VARIANT__MEMORY:
2703 variant_str = "Memory";
2704 break;
2705 default:
2706 return NULL;
2707 }
2708 sprintf(event_descr_str, "Write Only. Sets bit mask, 1's for %s frequency value in support table permitted. All 0 mask prohibited.",
2709 variant_str);
2710 } else if (strcmp(name, "rsmi_dev_pci_bandwidth_get") == 0) {
2711 switch (variant) {
2712 case ROCS_PCI_BW_VARIANT__COUNT:
2713 return strdup("Number of PCI transfers rates available.");
2714 case ROCS_PCI_BW_VARIANT__CURRENT:
2715 return strdup("Current PCI transfer rate.");
2716 case ROCS_PCI_BW_VARIANT__RATE_IDX:
2717 sprintf(event_descr_str, "Returns PCI bandwidth rate value from supported_table[%i].", (int) subvariant);
2718 break;
2719 case ROCS_PCI_BW_VARIANT__LANE_IDX:
2720 sprintf(event_descr_str, "Returns PCI bandwidth rate corresponding lane count from supported_table[%i].", (int) subvariant);
2721 break;
2722 default:
2723 return NULL;
2724 }
2725 } else if (strcmp(name, "rsmi_dev_pci_bandwidth_set") == 0) {
2726 return strdup("Write Only. Sets bit mask, 1's for PCI transfer rates in supported_table permitted. All 0 mask prohibited");
2727 } else if (strcmp(name, "rsmi_dev_brand_get") == 0) {
2728 return strdup("Returns char* to z-terminated brand string; do not free().");
2729 } else if (strcmp(name, "rsmi_dev_name_get") == 0) {
2730 return strdup("Returns char* to z-terminated name string; do not free().");
2731 } else if (strcmp(name, "rsmi_dev_serial_number_get") == 0) {
2732 return strdup("Returns char* to z-terminated serial number string; do not free().");
2733 } else if (strcmp(name, "rsmi_dev_subsystem_name_get") == 0) {
2734 return strdup("Returns char* to z-terminated subsystem name string; do not free().");
2735 } else if (strcmp(name, "rsmi_dev_vbios_version_get") == 0) {
2736 return strdup("Returns char* to z-terminated vbios version string; do not free().");
2737 } else if (strcmp(name, "rsmi_dev_vendor_name_get") == 0) {
2738 return strdup("Returns char* to z-terminated vendor name string; do not free().");
2739 } else if (strcmp(name, "rsmi_dev_xgmi_evt_get") == 0) {
2740 const char *variant_str = NULL;
2741 switch (variant) {
2742 case ROCS_XGMI_VARIANT__MI50_0_NOP_TX:
2743 variant_str = "NOP operations sent to neightbor 0.";
2744 break;
2745 case ROCS_XGMI_VARIANT__MI50_0_REQUEST_TX:
2746 variant_str = "Outgoing requests to neighbor 0.";
2747 break;
2748 case ROCS_XGMI_VARIANT__MI50_0_RESPONSE_TX:
2749 variant_str = "Outgoing responses sent to neighbor 0.";
2750 break;
2751 case ROCS_XGMI_VARIANT__MI50_0_BEATS_TX:
2752 variant_str = "Data beats sent to neighbor 0.";
2753 break;
2754 case ROCS_XGMI_VARIANT__MI50_1_NOP_TX:
2755 variant_str = "NOP operations sent to neightbor 1.";
2756 break;
2757 case ROCS_XGMI_VARIANT__MI50_1_REQUEST_TX:
2758 variant_str = "Outgoing requests to neighbor 1.";
2759 break;
2760 case ROCS_XGMI_VARIANT__MI50_1_RESPONSE_TX:
2761 variant_str = "Outgoing responses sent to neighbor 1.";
2762 break;
2763 case ROCS_XGMI_VARIANT__MI50_1_BEATS_TX:
2764 variant_str = "Data beats sent to neighbor 1.";
2765 break;
2766 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_0:
2767 variant_str = "Data beats sent to neighbor 0.";
2768 break;
2769 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_1:
2770 variant_str = "Data beats sent to neighbor 1.";
2771 break;
2772 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_2:
2773 variant_str = "Data beats sent to neighbor 2.";
2774 break;
2775 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_3:
2776 variant_str = "Data beats sent to neighbor 3.";
2777 break;
2778 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_4:
2779 variant_str = "Data beats sent to neighbor 4.";
2780 break;
2781 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_5:
2782 variant_str = "Data beats sent to neighbor 5.";
2783 break;
2784 default:
2785 return NULL;
2786 }
2787 sprintf(event_descr_str, "%s", variant_str);
2788 } else if (strcmp(name, "rsmi_dev_xgmi_bw_get") == 0) {
2789 switch (variant) {
2790 case ROCS_XGMI_BW_VARIANT__MIN:
2791 sprintf(event_descr_str, "%s.", "Minimum bandwidth between devices");
2792 break;
2793 case ROCS_XGMI_BW_VARIANT__MAX:
2794 sprintf(event_descr_str, "%s.", "Maximum bandwidth between devices");
2795 break;
2796 default:
2797 return NULL;
2798 }
2799 } else {
2800 return NULL;
2801 }
2802
2803 return strdup(event_descr_str);
2804}
2805
2806rocs_access_mode_e
2807get_access_mode(const char *name)
2808{
2809 if (strstr(name, "_get")) {
2810 return ROCS_ACCESS_MODE__READ;
2811 } else if (strstr(name, "_put") || strstr(name, "_reset")) {
2812 return ROCS_ACCESS_MODE__WRITE;
2813 }
2814 return ROCS_ACCESS_MODE__READ;
2815}
2816
2817open_function_f
2818get_open_func(const char *name)
2819{
2820 int i = 0;
2821 while (event_function_table[i].name != NULL) {
2822 if (strcmp(name, event_function_table[i].name) == 0) {
2823 return event_function_table[i].open_func_p;
2824 }
2825 ++i;
2826 }
2827
2828 return NULL;
2829}
2830
2831close_function_f
2832get_close_func(const char *name)
2833{
2834 int i = 0;
2835 while (event_function_table[i].name != NULL) {
2836 if (strcmp(name, event_function_table[i].name) == 0) {
2837 return event_function_table[i].close_func_p;
2838 }
2839 ++i;
2840 }
2841
2842 return NULL;
2843}
2844
2845start_function_f
2846get_start_func(const char *name)
2847{
2848 int i = 0;
2849 while (event_function_table[i].name != NULL) {
2850 if (strcmp(name, event_function_table[i].name) == 0) {
2851 return event_function_table[i].start_func_p;
2852 }
2853 ++i;
2854 }
2855
2856 return NULL;
2857}
2858
2859stop_function_f
2860get_stop_func(const char *name)
2861{
2862 int i = 0;
2863 while (event_function_table[i].name != NULL) {
2864 if (strcmp(name, event_function_table[i].name) == 0) {
2865 return event_function_table[i].stop_func_p;
2866 }
2867 ++i;
2868 }
2869
2870 return NULL;
2871}
2872
2873access_function_f
2874get_access_func(const char *name)
2875{
2876 int i = 0;
2877 while (event_function_table[i].name != NULL) {
2878 if (strcmp(name, event_function_table[i].name) == 0) {
2879 return event_function_table[i].access_func_p;
2880 }
2881 ++i;
2882 }
2883
2884 return NULL;
2885}
2886
2887int
2888open_simple(void *arg __attribute__((unused)))
2889{
2890 return PAPI_OK;
2891}
2892
2893int
2894close_simple(void *arg __attribute__((unused)))
2895{
2896 return PAPI_OK;
2897}
2898
2899int
2900start_simple(void *arg)
2901{
2902 ntv_event_t *event = (ntv_event_t *) arg;
2903 event->value = 0;
2904 return PAPI_OK;
2905}
2906
2907int
2908stop_simple(void *arg __attribute__((unused)))
2909{
2910 return PAPI_OK;
2911}
2912
2913int
2914open_xgmi_evt(void *arg)
2915{
2916 int papi_errno = PAPI_OK;
2917 ntv_event_t *event = (ntv_event_t *) arg;
2918 rsmi_status_t status;
2919 rsmi_event_group_t grp;
2920
2921 switch (event->variant) {
2922 case ROCS_XGMI_VARIANT__MI50_0_NOP_TX:
2923 case ROCS_XGMI_VARIANT__MI50_0_REQUEST_TX:
2924 case ROCS_XGMI_VARIANT__MI50_0_RESPONSE_TX:
2925 case ROCS_XGMI_VARIANT__MI50_0_BEATS_TX:
2926 case ROCS_XGMI_VARIANT__MI50_1_NOP_TX:
2927 case ROCS_XGMI_VARIANT__MI50_1_REQUEST_TX:
2928 case ROCS_XGMI_VARIANT__MI50_1_RESPONSE_TX:
2929 case ROCS_XGMI_VARIANT__MI50_1_BEATS_TX:
2930 grp = RSMI_EVNT_GRP_XGMI;
2931 break;
2932 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_0:
2933 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_1:
2934 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_2:
2935 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_3:
2936 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_4:
2937 case ROCS_XGMI_VARIANT__MI100_DATA_OUT_5:
2938 grp = RSMI_EVNT_GRP_XGMI_DATA_OUT;
2939 break;
2940 default:
2941 papi_errno = PAPI_ENOSUPP;
2942 goto fn_fail;
2943 }
2944
2945 uint32_t counters;
2946 status = rsmi_counter_available_counters_get_p(event->device, grp, &counters);
2947 if (status != RSMI_STATUS_SUCCESS) {
2948 papi_errno = PAPI_EMISC;
2949 goto fn_fail;
2950 }
2951
2952 if (counters < 1) {
2953 papi_errno = PAPI_ECNFLCT;
2954 goto fn_fail;
2955 }
2956
2957 status = rsmi_dev_counter_create_p(event->device, event->variant, (rsmi_event_handle_t *) event->scratch);
2958 if (status != RSMI_STATUS_SUCCESS) {
2959 papi_errno = PAPI_EMISC;
2960 }
2961
2962 fn_exit:
2963 return papi_errno;
2964 fn_fail:
2965 goto fn_exit;
2966}
2967
2968int
2969close_xgmi_evt(void *arg)
2970{
2971 int papi_errno = PAPI_OK;
2972 ntv_event_t *event = (ntv_event_t *) arg;
2973 rsmi_status_t status;
2974
2975 status = rsmi_dev_counter_destroy_p(*(rsmi_event_handle_t *) event->scratch);
2976 if (status != RSMI_STATUS_SUCCESS) {
2977 papi_errno = PAPI_EMISC;
2978 }
2979
2980 return papi_errno;
2981}
2982
2983int
2984start_xgmi_evt(void *arg)
2985{
2986 int papi_errno = PAPI_OK;
2987 ntv_event_t *event = (ntv_event_t *) arg;
2988 rsmi_status_t status;
2989
2990 status = rsmi_counter_control_p(*(rsmi_event_handle_t *) event->scratch, RSMI_CNTR_CMD_START, NULL);
2991 if (status != RSMI_STATUS_SUCCESS) {
2992 papi_errno = PAPI_EMISC;
2993 }
2994
2995 return papi_errno;
2996}
2997
2998int
2999stop_xgmi_evt(void *arg)
3000{
3001 int papi_errno = PAPI_OK;
3002 ntv_event_t *event = (ntv_event_t *) arg;
3003 rsmi_status_t status;
3004
3005 status = rsmi_counter_control_p(*(rsmi_event_handle_t *) event->scratch, RSMI_CNTR_CMD_STOP, NULL);
3006 if (status != RSMI_STATUS_SUCCESS) {
3007 papi_errno = PAPI_EMISC;
3008 }
3009
3010 return papi_errno;
3011}
3012
3013int
3014access_xgmi_evt(rocs_access_mode_e mode, void *arg)
3015{
3016 int papi_errno = PAPI_OK;
3017 ntv_event_t *event = (ntv_event_t *) arg;
3018 rsmi_status_t status;
3019 rsmi_counter_value_t value;
3020
3021 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3022 return PAPI_ENOSUPP;
3023 }
3024
3025 status = rsmi_counter_read_p(*(rsmi_event_handle_t *) event->scratch, &value);
3026 if (status != RSMI_STATUS_SUCCESS) {
3027 papi_errno = PAPI_EMISC;
3028 }
3029
3030 event->value = (int64_t) value.value;
3031 return papi_errno;
3032}
3033
3034int
3035access_xgmi_bw(rocs_access_mode_e mode, void *arg)
3036{
3037 ntv_event_t *event = (ntv_event_t *) arg;
3038
3039 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3040 return PAPI_ENOSUPP;
3041 }
3042
3043 rsmi_status_t status;
3044 uint64_t min, max;
3045 status = rsmi_minmax_bandwidth_get_p(event->device, (uint32_t) event->subvariant, &min, &max);
3046 if (status != RSMI_STATUS_SUCCESS) {
3047 return PAPI_EMISC;
3048 }
3049
3050 switch (event->variant) {
3051 case ROCS_XGMI_BW_VARIANT__MIN:
3052 event->value = (int64_t) min;
3053 break;
3054 case ROCS_XGMI_BW_VARIANT__MAX:
3055 event->value = (int64_t) max;
3056 break;
3057 default:
3058 return PAPI_ENOSUPP;
3059 }
3060
3061 return PAPI_OK;
3062}
3063
3064int
3065access_rsmi_dev_count(rocs_access_mode_e mode, void *arg)
3066{
3067 ntv_event_t *event = (ntv_event_t *) arg;
3068
3069 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3070 return PAPI_ENOSUPP;
3071 }
3072
3073 event->value = (int64_t) device_count;
3074 return PAPI_OK;
3075}
3076
3077int
3078access_rsmi_lib_version(rocs_access_mode_e mode, void *arg)
3079{
3080 ntv_event_t *event = (ntv_event_t *) arg;
3081
3082 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3083 return PAPI_ENOSUPP;
3084 }
3085
3086 rsmi_status_t status;
3087 rsmi_version_t version;
3088 status = rsmi_version_get_p(&version);
3089 if (status != RSMI_STATUS_SUCCESS) {
3090 return PAPI_EMISC;
3091 }
3092 event->value = (int64_t)(version.major & 0x0000FFFF);
3093 event->value = (int64_t)(event->value << 16) | (version.minor & 0x0000FFFF);
3094 event->value = (int64_t)(event->value << 16) | (version.patch & 0x0000FFFF);
3095 return PAPI_OK;
3096}
3097
3098int
3099access_rsmi_dev_driver_version_str(rocs_access_mode_e mode, void *arg)
3100{
3101 ntv_event_t *event = (ntv_event_t *) arg;
3102
3103 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3104 return PAPI_ENOSUPP;
3105 }
3106
3107 rsmi_status_t status;
3108 status = rsmi_version_str_get_p(RSMI_SW_COMP_DRIVER, event->scratch, PAPI_MAX_STR_LEN - 1);
3109 if (status != RSMI_STATUS_SUCCESS) {
3110 return PAPI_EMISC;
3111 }
3112 event->scratch[PAPI_MAX_STR_LEN - 1] = 0;
3113 event->value = (int64_t) event->scratch;
3114 return PAPI_OK;
3115}
3116
3117int
3118access_rsmi_dev_id(rocs_access_mode_e mode, void *arg)
3119{
3120 ntv_event_t *event = (ntv_event_t *) arg;
3121
3122 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3123 return PAPI_ENOSUPP;
3124 }
3125
3126 rsmi_status_t status;
3127 uint16_t data;
3128 status = rsmi_dev_id_get_p(event->device, &data);
3129 if (status != RSMI_STATUS_SUCCESS) {
3130 return PAPI_EMISC;
3131 }
3132 event->value = (int64_t) data;
3133 return PAPI_OK;
3134}
3135
3136int
3137access_rsmi_dev_subsystem_vendor_id(rocs_access_mode_e mode, void *arg)
3138{
3139 ntv_event_t *event = (ntv_event_t *) arg;
3140
3141 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3142 return PAPI_ENOSUPP;
3143 }
3144
3145 rsmi_status_t status;
3146 uint16_t data;
3147 status = rsmi_dev_subsystem_vendor_id_get_p(event->device, &data);
3148 if (status != RSMI_STATUS_SUCCESS) {
3149 return PAPI_EMISC;
3150 }
3151 event->value = (int64_t) data;
3152 return PAPI_OK;
3153}
3154
3155int
3156access_rsmi_dev_vendor_id(rocs_access_mode_e mode, void *arg)
3157{
3158 ntv_event_t *event = (ntv_event_t *) arg;
3159
3160 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3161 return PAPI_ENOSUPP;
3162 }
3163
3164 rsmi_status_t status;
3165 uint16_t data;
3166 status = rsmi_dev_vendor_id_get_p(event->device, &data);
3167 if (status != RSMI_STATUS_SUCCESS) {
3168 return PAPI_EMISC;
3169 }
3170 event->value = (int64_t) data;
3171 return PAPI_OK;
3172}
3173
3174int
3175access_rsmi_dev_unique_id(rocs_access_mode_e mode, void *arg)
3176{
3177 ntv_event_t *event = (ntv_event_t *) arg;
3178
3179 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3180 return PAPI_ENOSUPP;
3181 }
3182
3183 rsmi_status_t status;
3184 uint64_t data;
3185 status = rsmi_dev_unique_id_get_p(event->device, &data);
3186 if (status != RSMI_STATUS_SUCCESS) {
3187 return PAPI_EMISC;
3188 }
3189 event->value = (int64_t) data;
3190 return PAPI_OK;
3191}
3192
3193int
3194access_rsmi_dev_subsystem_id(rocs_access_mode_e mode, void *arg)
3195{
3196 ntv_event_t *event = (ntv_event_t *) arg;
3197
3198 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3199 return PAPI_ENOSUPP;
3200 }
3201
3202 rsmi_status_t status;
3203 uint16_t data;
3204 status = rsmi_dev_subsystem_id_get_p(event->device, &data);
3205 if (status != RSMI_STATUS_SUCCESS) {
3206 return PAPI_EMISC;
3207 }
3208 event->value = (int64_t) data;
3209 return PAPI_OK;
3210}
3211
3212int
3213access_rsmi_dev_drm_render_minor(rocs_access_mode_e mode, void *arg)
3214{
3215 ntv_event_t *event = (ntv_event_t *) arg;
3216
3217 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3218 return PAPI_ENOSUPP;
3219 }
3220
3221 rsmi_status_t status;
3222 uint32_t data;
3223 status = rsmi_dev_drm_render_minor_get_p(event->device, &data);
3224 if (status != RSMI_STATUS_SUCCESS) {
3225 return PAPI_EMISC;
3226 }
3227 event->value = (int64_t) data;
3228 return PAPI_OK;
3229}
3230
3231int
3232access_rsmi_dev_overdrive_level(rocs_access_mode_e mode, void *arg)
3233{
3234 ntv_event_t *event = (ntv_event_t *) arg;
3235
3236 if (!(mode & event->mode)) {
3237 /* Return error code as counter value to distinguish
3238 * this case from a successful read */
3239 event->value = PAPI_ENOSUPP;
3240 return PAPI_OK;
3241 }
3242
3243 rsmi_status_t status;
3244 uint32_t data;
3245 if (mode == ROCS_ACCESS_MODE__READ) {
3246 status = rsmi_dev_overdrive_level_get_p(event->device, &data);
3247 if (status != RSMI_STATUS_SUCCESS) {
3248 return PAPI_EMISC;
3249 }
3250 event->value = (int64_t) data;
3251 } else {
3252 data = (uint32_t) event->value;
3253 status = rsmi_dev_overdrive_level_set_p(event->device, data);
3254 if (status != RSMI_STATUS_SUCCESS) {
3255 return PAPI_EMISC;
3256 }
3257 }
3258 return PAPI_OK;
3259}
3260
3261int
3262access_rsmi_dev_perf_level(rocs_access_mode_e mode, void *arg)
3263{
3264 ntv_event_t *event = (ntv_event_t *) arg;
3265
3266 if (!(mode & event->mode)) {
3267 /* Return error code as counter value to distinguish
3268 * this case from a successful read */
3269 event->value = PAPI_ENOSUPP;
3270 return PAPI_OK;
3271 }
3272
3273 rsmi_status_t status;
3274 rsmi_dev_perf_level_t data;
3275 if (mode == ROCS_ACCESS_MODE__READ) {
3276 status = rsmi_dev_perf_level_get_p(event->device, &data);
3277 if (status != RSMI_STATUS_SUCCESS) {
3278 return PAPI_EMISC;
3279 }
3280 event->value = (int64_t) data;
3281 } else {
3282 data = (rsmi_dev_perf_level_t) event->value;
3283 status = rsmi_dev_perf_level_set_p(event->device, data);
3284 if (status != RSMI_STATUS_SUCCESS) {
3285 return PAPI_EMISC;
3286 }
3287 }
3288 return PAPI_OK;
3289}
3290
3291int
3292access_rsmi_dev_memory_total(rocs_access_mode_e mode, void *arg)
3293{
3294 ntv_event_t *event = (ntv_event_t *) arg;
3295
3296 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3297 return PAPI_ENOSUPP;
3298 }
3299
3300 rsmi_status_t status;
3301 uint64_t data;
3302 status = rsmi_dev_memory_total_get_p(event->device, event->variant, &data);
3303 if (status != RSMI_STATUS_SUCCESS) {
3304 return PAPI_EMISC;
3305 }
3306 event->value = (int64_t) data;
3307 return PAPI_OK;
3308}
3309
3310int
3311access_rsmi_dev_memory_usage(rocs_access_mode_e mode, void *arg)
3312{
3313 ntv_event_t *event = (ntv_event_t *) arg;
3314
3315 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3316 return PAPI_ENOSUPP;
3317 }
3318
3319 rsmi_status_t status;
3320 uint64_t data;
3321 status = rsmi_dev_memory_usage_get_p(event->device, event->variant, &data);
3322 if (status != RSMI_STATUS_SUCCESS) {
3323 return PAPI_EMISC;
3324 }
3325 event->value = (int64_t) data;
3326 return PAPI_OK;
3327}
3328
3329int
3330access_rsmi_dev_memory_busy_percent(rocs_access_mode_e mode, void *arg)
3331{
3332 ntv_event_t *event = (ntv_event_t *) arg;
3333
3334 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3335 return PAPI_ENOSUPP;
3336 }
3337
3338 rsmi_status_t status;
3339 uint32_t data;
3340 status = rsmi_dev_memory_busy_percent_get_p(event->device, &data);
3341 if (status != RSMI_STATUS_SUCCESS) {
3342 return PAPI_EMISC;
3343 }
3344 event->value = (int64_t) data;
3345 return PAPI_OK;
3346}
3347
3348int
3349access_rsmi_dev_busy_percent(rocs_access_mode_e mode, void *arg)
3350{
3351 ntv_event_t *event = (ntv_event_t *) arg;
3352
3353 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3354 return PAPI_ENOSUPP;
3355 }
3356
3357 rsmi_status_t status;
3358 uint32_t data;
3359 status = rsmi_dev_busy_percent_get_p(event->device, &data);
3360 if (status != RSMI_STATUS_SUCCESS) {
3361 return PAPI_EMISC;
3362 }
3363 event->value = (int64_t) data;
3364 return PAPI_OK;
3365}
3366
3367int
3368access_rsmi_dev_pci_id(rocs_access_mode_e mode, void *arg)
3369{
3370 ntv_event_t *event = (ntv_event_t *) arg;
3371
3372 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3373 return PAPI_ENOSUPP;
3374 }
3375
3376 rsmi_status_t status;
3377 uint64_t data;
3378 status = rsmi_dev_pci_id_get_p(event->device, &data);
3379 if (status != RSMI_STATUS_SUCCESS) {
3380 return PAPI_EMISC;
3381 }
3382 event->value = (int64_t) data;
3383 return PAPI_OK;
3384}
3385
3386int
3387access_rsmi_dev_pci_replay_counter(rocs_access_mode_e mode, void *arg)
3388{
3389 ntv_event_t *event = (ntv_event_t *) arg;
3390
3391 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3392 return PAPI_ENOSUPP;
3393 }
3394
3395 rsmi_status_t status;
3396 uint64_t data;
3397 status = rsmi_dev_pci_replay_counter_get_p(event->device, &data);
3398 if (status != RSMI_STATUS_SUCCESS) {
3399 return PAPI_EMISC;
3400 }
3401 event->value = (int64_t) data;
3402 return PAPI_OK;
3403}
3404
3405int
3406access_rsmi_dev_pci_throughput(rocs_access_mode_e mode, void *arg)
3407{
3408 ntv_event_t *event = (ntv_event_t *) arg;
3409
3410 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3411 return PAPI_ENOSUPP;
3412 }
3413
3414 rsmi_status_t status;
3415 uint64_t data[3];
3416 status = rsmi_dev_pci_throughput_get_p(event->device, &data[0], &data[1], &data[2]);
3417 if (status != RSMI_STATUS_SUCCESS) {
3418 return PAPI_EMISC;
3419 }
3420
3421 switch (event->variant) {
3422 case ROCS_PCI_THROUGHPUT_VARIANT__SENT:
3423 event->value = (int64_t) data[0];
3424 break;
3425 case ROCS_PCI_THROUGHPUT_VARIANT__RECEIVED:
3426 event->value = (int64_t) data[1];
3427 break;
3428 case ROCS_PCI_THROUGHPUT_VARIANT__MAX_PACKET_SIZE:
3429 event->value = (int64_t) data[2];
3430 break;
3431 default:
3432 return PAPI_EMISC;
3433 }
3434
3435 return PAPI_OK;
3436}
3437
3438int
3439access_rsmi_dev_power_profile_presets(rocs_access_mode_e mode, void *arg)
3440{
3441 ntv_event_t *event = (ntv_event_t *) arg;
3442
3443 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3444 return PAPI_ENOSUPP;
3445 }
3446
3447 rsmi_status_t status;
3448 rsmi_power_profile_status_t profile;
3449 status = rsmi_dev_power_profile_presets_get_p(event->device, event->variant, &profile);
3450 if (status != RSMI_STATUS_SUCCESS) {
3451 return PAPI_EMISC;
3452 }
3453
3454 switch (event->variant) {
3455 case ROCS_POWER_PRESETS_VARIANT__COUNT:
3456 event->value = (int64_t) profile.num_profiles;
3457 break;
3458 case ROCS_POWER_PRESETS_VARIANT__AVAIL_PROFILES:
3459 event->value = (int64_t) profile.available_profiles;
3460 break;
3461 case ROCS_POWER_PRESETS_VARIANT__CURRENT:
3462 event->value = (int64_t) profile.current;
3463 break;
3464 default:
3465 return PAPI_EMISC;
3466 }
3467 return PAPI_OK;
3468}
3469
3470int
3471access_rsmi_dev_power_profile_set(rocs_access_mode_e mode, void *arg)
3472{
3473 ntv_event_t *event = (ntv_event_t *) arg;
3474
3475 if (mode != ROCS_ACCESS_MODE__WRITE || mode != event->mode) {
3476 /* Return error code as counter value to distinguish
3477 * this case from a successful read */
3478 event->value = PAPI_ENOSUPP;
3479 return PAPI_OK;
3480 }
3481
3482 rsmi_status_t status;
3483 rsmi_power_profile_preset_masks_t mask = (rsmi_power_profile_preset_masks_t) event->value;
3484 status = rsmi_dev_power_profile_set_p(event->device, event->variant, mask);
3485 if (status != RSMI_STATUS_SUCCESS) {
3486 return PAPI_EMISC;
3487 }
3488 return PAPI_OK;
3489}
3490
3491int
3492access_rsmi_dev_fan_reset(rocs_access_mode_e mode, void *arg)
3493{
3494 ntv_event_t *event = (ntv_event_t *) arg;
3495
3496 if (mode != ROCS_ACCESS_MODE__WRITE || mode != event->mode) {
3497 /* Return error code as counter value to distinguish
3498 * this case from a successful read */
3499 event->value = PAPI_ENOSUPP;
3500 return PAPI_OK;
3501 }
3502
3503 rsmi_status_t status;
3504 status = rsmi_dev_fan_reset_p(event->device, event->subvariant);
3505 if (status != RSMI_STATUS_SUCCESS) {
3506 return PAPI_EMISC;
3507 }
3508 return PAPI_OK;
3509}
3510
3511int
3512access_rsmi_dev_fan_rpms(rocs_access_mode_e mode, void *arg)
3513{
3514 ntv_event_t *event = (ntv_event_t *) arg;
3515
3516 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3517 return PAPI_ENOSUPP;
3518 }
3519
3520 rsmi_status_t status;
3521 status = rsmi_dev_fan_rpms_get_p(event->device, event->subvariant, &event->value);
3522 if (status != RSMI_STATUS_SUCCESS) {
3523 return PAPI_EMISC;
3524 }
3525 return PAPI_OK;
3526}
3527
3528int
3529access_rsmi_dev_fan_speed_max(rocs_access_mode_e mode, void *arg)
3530{
3531 ntv_event_t *event = (ntv_event_t *) arg;
3532
3533 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3534 return PAPI_ENOSUPP;
3535 }
3536
3537 rsmi_status_t status;
3538 uint64_t data;
3539 status = rsmi_dev_fan_speed_max_get_p(event->device, event->subvariant, &data);
3540 if (status != RSMI_STATUS_SUCCESS) {
3541 return PAPI_EMISC;
3542 }
3543 event->value = (int64_t) data;
3544 return PAPI_OK;
3545}
3546
3547int
3548access_rsmi_dev_fan_speed(rocs_access_mode_e mode, void *arg)
3549{
3550 ntv_event_t *event = (ntv_event_t *) arg;
3551
3552 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3553 /* Return error code as counter value to distinguish
3554 * this case from a successful read */
3555 event->value = PAPI_ENOSUPP;
3556 return PAPI_OK;
3557 }
3558
3559 rsmi_status_t status;
3560 status = rsmi_dev_fan_speed_get_p(event->device, event->subvariant, &event->value);
3561 if (status != RSMI_STATUS_SUCCESS) {
3562 return PAPI_EMISC;
3563 }
3564 return PAPI_OK;
3565}
3566
3567int
3568access_rsmi_dev_power_ave(rocs_access_mode_e mode, void *arg)
3569{
3570 ntv_event_t *event = (ntv_event_t *) arg;
3571
3572 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3573 return PAPI_ENOSUPP;
3574 }
3575
3576 rsmi_status_t status;
3577 uint64_t data;
3578 status = rsmi_dev_power_avg_get_p(event->device, event->subvariant, &data);
3579 if (status != RSMI_STATUS_SUCCESS) {
3580 return PAPI_EMISC;
3581 }
3582 event->value = (int64_t) data;
3583 return PAPI_OK;
3584}
3585
3586int
3587access_rsmi_dev_power_cap(rocs_access_mode_e mode, void *arg)
3588{
3589 ntv_event_t *event = (ntv_event_t *) arg;
3590
3591 if (!(mode & event->mode)) {
3592 /* Return error code as counter value to distinguish
3593 * this case from a successful read */
3594 event->value = PAPI_ENOSUPP;
3595 return PAPI_OK;
3596 }
3597
3598 rsmi_status_t status;
3599 uint64_t data;
3600 if (mode == ROCS_ACCESS_MODE__READ) {
3601 status = rsmi_dev_power_cap_get_p(event->device, event->subvariant, &data);
3602 if (status != RSMI_STATUS_SUCCESS) {
3603 return PAPI_EMISC;
3604 }
3605 event->value = (int64_t) data;
3606 } else {
3607 data = (uint64_t) event->value;
3608 status = rsmi_dev_power_cap_set_p(event->device, event->subvariant, data);
3609 if (status != RSMI_STATUS_SUCCESS) {
3610 return PAPI_EMISC;
3611 }
3612 }
3613 return PAPI_OK;
3614}
3615
3616int
3617access_rsmi_dev_power_cap_range(rocs_access_mode_e mode, void *arg)
3618{
3619 ntv_event_t *event = (ntv_event_t *) arg;
3620
3621 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3622 return PAPI_ENOSUPP;
3623 }
3624
3625 rsmi_status_t status;
3626 uint64_t data[2];
3627 status = rsmi_dev_power_cap_range_get_p(event->device, event->subvariant, &data[0], &data[1]);
3628 if (status != RSMI_STATUS_SUCCESS) {
3629 return PAPI_EMISC;
3630 }
3631
3632 switch (event->variant) {
3633 case ROCS_POWER_CAP_RANGE_VARIANT__MIN:
3634 event->value = (int64_t) data[1];
3635 break;
3636 case ROCS_POWER_CAP_RANGE_VARIANT__MAX:
3637 event->value = (int64_t) data[0];
3638 break;
3639 default:
3640 return PAPI_EMISC;
3641 }
3642 return PAPI_OK;
3643}
3644
3645int
3646access_rsmi_dev_temp_metric(rocs_access_mode_e mode, void *arg)
3647{
3648 ntv_event_t *event = (ntv_event_t *) arg;
3649
3650 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3651 return PAPI_ENOSUPP;
3652 }
3653
3654 rsmi_status_t status;
3655 status = rsmi_dev_temp_metric_get_p(event->device, event->subvariant, event->variant, &event->value);
3656 if (status != RSMI_STATUS_SUCCESS) {
3657 return PAPI_EMISC;
3658 }
3659 return PAPI_OK;
3660}
3661
3662int
3663access_rsmi_dev_firmware_version(rocs_access_mode_e mode, void *arg)
3664{
3665 ntv_event_t *event = (ntv_event_t *) arg;
3666
3667 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3668 return PAPI_ENOSUPP;
3669 }
3670
3671 rsmi_status_t status;
3672 uint64_t data;
3673 status = rsmi_dev_firmware_version_get_p(event->device, event->variant, &data);
3674 if (status != RSMI_STATUS_SUCCESS) {
3675 return PAPI_EMISC;
3676 }
3677 event->value = (int64_t) data;
3678 return PAPI_OK;
3679}
3680
3681int
3682access_rsmi_dev_ecc_count(rocs_access_mode_e mode, void *arg)
3683{
3684 ntv_event_t *event = (ntv_event_t *) arg;
3685
3686 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3687 return PAPI_ENOSUPP;
3688 }
3689
3690 rsmi_status_t status;
3691 rsmi_error_count_t data;
3692 status = rsmi_dev_ecc_count_get_p(event->device, event->variant, &data);
3693 if (status != RSMI_STATUS_SUCCESS) {
3694 return PAPI_EMISC;
3695 }
3696
3697 switch (event->subvariant) {
3698 case ROCS_ECC_COUNT_SUBVARIANT__CORRECTABLE:
3699 event->value = (int64_t) data.correctable_err;
3700 break;
3701 case ROCS_ECC_COUNT_SUBVARIANT__UNCORRECTABLE:
3702 event->value = (int64_t) data.uncorrectable_err;
3703 break;
3704 default:
3705 return PAPI_EMISC;
3706 }
3707 return PAPI_OK;
3708}
3709
3710int
3711access_rsmi_dev_ecc_enabled(rocs_access_mode_e mode, void *arg)
3712{
3713 ntv_event_t *event = (ntv_event_t *) arg;
3714
3715 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3716 return PAPI_ENOSUPP;
3717 }
3718
3719 rsmi_status_t status;
3720 uint64_t data;
3721 status = rsmi_dev_ecc_enabled_get_p(event->device, &data);
3722 if (status != RSMI_STATUS_SUCCESS) {
3723 return PAPI_EMISC;
3724 }
3725 event->value = (int64_t) data;
3726 return PAPI_OK;
3727}
3728
3729int
3730access_rsmi_dev_ecc_status(rocs_access_mode_e mode, void *arg)
3731{
3732 ntv_event_t *event = (ntv_event_t *) arg;
3733
3734 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3735 return PAPI_ENOSUPP;
3736 }
3737
3738 rsmi_status_t status;
3739 rsmi_ras_err_state_t data;
3740 status = rsmi_dev_ecc_status_get_p(event->device, event->variant, &data);
3741 if (status != RSMI_STATUS_SUCCESS) {
3742 return PAPI_EMISC;
3743 }
3744 event->value = (int64_t) data;
3745 return PAPI_OK;
3746}
3747
3748int
3749access_rsmi_dev_gpu_clk_freq(rocs_access_mode_e mode, void *arg)
3750{
3751 ntv_event_t *event = (ntv_event_t *) arg;
3752
3753 if (!(mode & event->mode)) {
3754 /* Return error code as counter value to distinguish
3755 * this case from a successful read */
3756 event->value = PAPI_ENOSUPP;
3757 return PAPI_OK;
3758 }
3759
3760 rsmi_status_t status;
3761 if (mode == ROCS_ACCESS_MODE__READ) {
3762 int table_id = ROCS_GPU_CLK_FREQ_VARIANT__NUM * event->device + event->variant;
3763 status = rsmi_dev_gpu_clk_freq_get_p(event->device, event->variant, &freq_table[table_id]);
3764 if (status != RSMI_STATUS_SUCCESS) {
3765 return PAPI_EMISC;
3766 }
3767 uint32_t current, freq_id;
3768 switch (event->subvariant) {
3769 case ROCS_GPU_CLK_FREQ_SUBVARIANT__COUNT:
3770 event->value = (int64_t) freq_table[table_id].num_supported;
3771 break;
3772 case ROCS_GPU_CLK_FREQ_SUBVARIANT__CURRENT:
3773 current = freq_table[table_id].current;
3774 event->value = (int64_t) freq_table[table_id].frequency[current];
3775 break;
3776 default:
3777 freq_id = event->subvariant - ROCS_GPU_CLK_FREQ_SUBVARIANT__NUM;
3778 event->value = (int64_t) freq_table[table_id].frequency[freq_id];
3779 }
3780 } else {
3781 uint64_t data = (uint64_t) event->value;
3782 uint32_t freq_id = (uint32_t) (event->device * ROCS_GPU_CLK_FREQ_VARIANT__NUM + event->variant);
3783 uint64_t mask = (1 << freq_table[freq_id].num_supported) - 1;
3784 if ((data & mask) == 0) {
3785 return PAPI_EINVAL;
3786 }
3787 status = rsmi_dev_gpu_clk_freq_set_p(event->device, event->variant, data & mask);
3788 if (status != RSMI_STATUS_SUCCESS) {
3789 return PAPI_EMISC;
3790 }
3791 }
3792 return PAPI_OK;
3793}
3794
3795int
3796access_rsmi_dev_pci_bandwidth(rocs_access_mode_e mode, void *arg)
3797{
3798 ntv_event_t *event = (ntv_event_t *) arg;
3799
3800 if (!(mode & event->mode)) {
3801 /* Return error code as counter value to distinguish
3802 * this case from a successful read */
3803 event->value = PAPI_ENOSUPP;
3804 return PAPI_OK;
3805 }
3806
3807 rsmi_status_t status;
3808 if (mode == ROCS_ACCESS_MODE__READ) {
3809 uint32_t current;
3810 status = rsmi_dev_pci_bandwidth_get_p(event->device, &pcie_table[event->device]);
3811 if (status != RSMI_STATUS_SUCCESS) {
3812 return PAPI_EMISC;
3813 }
3814
3815 switch (event->variant) {
3816 case ROCS_PCI_BW_VARIANT__COUNT:
3817 event->value = (int64_t) pcie_table[event->device].transfer_rate.num_supported;
3818 break;
3819 case ROCS_PCI_BW_VARIANT__CURRENT:
3820 current = pcie_table[event->device].transfer_rate.current;
3821 event->value = (int64_t) pcie_table[event->device].transfer_rate.frequency[current];
3822 break;
3823 case ROCS_PCI_BW_VARIANT__RATE_IDX:
3824 case ROCS_PCI_BW_VARIANT__LANE_IDX:
3825 current = event->subvariant;
3826 event->value = (int64_t) pcie_table[event->device].transfer_rate.frequency[current];
3827 break;
3828 default:
3829 return PAPI_EMISC;
3830 }
3831 } else {
3832 uint64_t data = (uint64_t) event->value;
3833 uint64_t mask = (1 << pcie_table[event->device].transfer_rate.num_supported) - 1;
3834 if ((data & mask) == 0) {
3835 return PAPI_EINVAL;
3836 }
3837 status = rsmi_dev_pci_bandwidth_set_p(event->device, data & mask);
3838 if (status != RSMI_STATUS_SUCCESS) {
3839 return PAPI_EMISC;
3840 }
3841 }
3842 return PAPI_OK;
3843}
3844
3845int
3846access_rsmi_dev_brand(rocs_access_mode_e mode, void *arg)
3847{
3848 ntv_event_t *event = (ntv_event_t *) arg;
3849
3850 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3851 return PAPI_ENOSUPP;
3852 }
3853
3854 rsmi_status_t status;
3855 status = rsmi_dev_brand_get_p(event->device, event->scratch, PAPI_MAX_STR_LEN - 1);
3856 if (status != RSMI_STATUS_SUCCESS) {
3857 return PAPI_EMISC;
3858 }
3859 event->scratch[PAPI_MAX_STR_LEN - 1] = 0;
3860 event->value = (int64_t) event->scratch;
3861 return PAPI_OK;
3862}
3863
3864int
3865access_rsmi_dev_name(rocs_access_mode_e mode, void *arg)
3866{
3867 ntv_event_t *event = (ntv_event_t *) arg;
3868
3869 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3870 return PAPI_ENOSUPP;
3871 }
3872
3873 rsmi_status_t status;
3874 status = rsmi_dev_name_get_p(event->device, event->scratch, PAPI_MAX_STR_LEN - 1);
3875 if (status != RSMI_STATUS_SUCCESS) {
3876 return PAPI_EMISC;
3877 }
3878 event->scratch[PAPI_MAX_STR_LEN - 1] = 0;
3879 event->value = (int64_t) event->scratch;
3880 return PAPI_OK;
3881}
3882
3883int
3884access_rsmi_dev_serial_number(rocs_access_mode_e mode, void *arg)
3885{
3886 ntv_event_t *event = (ntv_event_t *) arg;
3887
3888 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3889 return PAPI_ENOSUPP;
3890 }
3891
3892 rsmi_status_t status;
3893 status = rsmi_dev_serial_number_get_p(event->device, event->scratch, PAPI_MAX_STR_LEN - 1);
3894 if (status != RSMI_STATUS_SUCCESS) {
3895 return PAPI_EMISC;
3896 }
3897 event->scratch[PAPI_MAX_STR_LEN - 1] = 0;
3898 event->value = (int64_t) event->scratch;
3899 return PAPI_OK;
3900}
3901
3902int
3903access_rsmi_dev_subsystem_name(rocs_access_mode_e mode, void *arg)
3904{
3905 ntv_event_t *event = (ntv_event_t *) arg;
3906
3907 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3908 return PAPI_ENOSUPP;
3909 }
3910
3911 rsmi_status_t status;
3912 status = rsmi_dev_subsystem_name_get_p(event->device, event->scratch, PAPI_MAX_STR_LEN - 1);
3913 if (status != RSMI_STATUS_SUCCESS) {
3914 return PAPI_EMISC;
3915 }
3916 event->scratch[PAPI_MAX_STR_LEN - 1] = 0;
3917 event->value = (int64_t) event->scratch;
3918 return PAPI_OK;
3919}
3920
3921int
3922access_rsmi_dev_vbios_version(rocs_access_mode_e mode, void *arg)
3923{
3924 ntv_event_t *event = (ntv_event_t *) arg;
3925
3926 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3927 return PAPI_ENOSUPP;
3928 }
3929
3930 rsmi_status_t status;
3931 status = rsmi_dev_vbios_version_get_p(event->device, event->scratch, PAPI_MAX_STR_LEN);
3932 if (status != RSMI_STATUS_SUCCESS) {
3933 return PAPI_EMISC;
3934 }
3935 event->scratch[PAPI_MAX_STR_LEN - 1] = 0;
3936 event->value = (int64_t) event->scratch;
3937 return PAPI_OK;
3938}
3939
3940int
3941access_rsmi_dev_vendor_name(rocs_access_mode_e mode, void *arg)
3942{
3943 ntv_event_t *event = (ntv_event_t *) arg;
3944
3945 if (mode != ROCS_ACCESS_MODE__READ || mode != event->mode) {
3946 return PAPI_ENOSUPP;
3947 }
3948
3949 rsmi_status_t status;
3950 status = rsmi_dev_vendor_name_get_p(event->device, event->scratch, PAPI_MAX_STR_LEN - 1);
3951 if (status != RSMI_STATUS_SUCCESS) {
3952 return PAPI_EMISC;
3953 }
3954 event->scratch[PAPI_MAX_STR_LEN - 1] = 0;
3955 event->value = (int64_t) event->scratch;
3956 return PAPI_OK;
3957}
i
int i
Definition: PAPI_get_virt_cyc.c:10
count
static long count
Definition: child_overflow.c:33
htable_insert
static int htable_insert(void *handle, const char *key, void *in)
Definition: cuda/htable.h:92
htable_delete
static int htable_delete(void *handle, const char *key)
Definition: cuda/htable.h:130
HTABLE_ENOVAL
#define HTABLE_ENOVAL
Definition: cuda/htable.h:18
htable_shutdown
static int htable_shutdown(void *handle)
Definition: cuda/htable.h:76
HTABLE_SUCCESS
#define HTABLE_SUCCESS
Definition: cuda/htable.h:17
htable_find
static int htable_find(void *handle, const char *key, void **out)
Definition: cuda/htable.h:161
htable_init
static int htable_init(void **handle)
Definition: cuda/htable.h:55
min
#define min(x, y)
Definition: darwin-common.h:4
PAPI_ENUM_EVENTS
#define PAPI_ENUM_EVENTS
Definition: f90papi.h:224
PAPI_OK
#define PAPI_OK
Definition: f90papi.h:73
PAPI_ENUM_FIRST
#define PAPI_ENUM_FIRST
Definition: f90papi.h:85
PAPI_ECNFLCT
#define PAPI_ECNFLCT
Definition: f90papi.h:234
PAPI_ENOEVNT
#define PAPI_ENOEVNT
Definition: f90papi.h:139
PAPI_END
#define PAPI_END
Definition: f90papi.h:303
PAPI_EINVAL
#define PAPI_EINVAL
Definition: f90papi.h:115
PAPI_ENOSUPP
#define PAPI_ENOSUPP
Definition: f90papi.h:244
PAPI_MAX_STR_LEN
#define PAPI_MAX_STR_LEN
Definition: f90papi.h:77
PAPI_EMISC
#define PAPI_EMISC
Definition: f90papi.h:122
PAPI_ECMP
#define PAPI_ECMP
Definition: f90papi.h:214
PAPI_ENOMEM
#define PAPI_ENOMEM
Definition: f90papi.h:16
events
char events[MAX_EVENTS][BUFSIZ]
Definition: host_micpower_plot.c:17
iter
static long iter[MAX_THREADS]
Definition: krentel_pthreads.c:22
num_events
static int num_events
Definition: linux-coretemp.c:37
version
uint8_t version
Definition: linux-sensors-ppc.h:1
__attribute__
unsigned long AO_t __attribute__((__aligned__(4)))
Definition: m68k.h:21
papi.h
Return codes and api definitions.
size_t
long unsigned int size_t
Definition: papi_fwrappers_.c:48
papi_memory.h
papi_calloc
#define papi_calloc(a, b)
Definition: papi_memory.h:37
papi_free
#define papi_free(a)
Definition: papi_memory.h:35
events_id
uint64_t * events_id
Definition: roc_profiler.c:1448
htable.h
rocs_pci_throughput_variant_e
rocs_pci_throughput_variant_e
Definition: rocs.c:93
ROCS_PCI_THROUGHPUT_VARIANT__RECEIVED
@ ROCS_PCI_THROUGHPUT_VARIANT__RECEIVED
Definition: rocs.c:95
ROCS_PCI_THROUGHPUT_VARIANT__NUM
@ ROCS_PCI_THROUGHPUT_VARIANT__NUM
Definition: rocs.c:97
ROCS_PCI_THROUGHPUT_VARIANT__MAX_PACKET_SIZE
@ ROCS_PCI_THROUGHPUT_VARIANT__MAX_PACKET_SIZE
Definition: rocs.c:96
ROCS_PCI_THROUGHPUT_VARIANT__SENT
@ ROCS_PCI_THROUGHPUT_VARIANT__SENT
Definition: rocs.c:94
rocs_xgmi_bw_variant_e
rocs_xgmi_bw_variant_e
Definition: rocs.c:161
ROCS_XGMI_BW_VARIANT__NUM
@ ROCS_XGMI_BW_VARIANT__NUM
Definition: rocs.c:164
ROCS_XGMI_BW_VARIANT__MIN
@ ROCS_XGMI_BW_VARIANT__MIN
Definition: rocs.c:162
ROCS_XGMI_BW_VARIANT__MAX
@ ROCS_XGMI_BW_VARIANT__MAX
Definition: rocs.c:163
rsmi_counter_control_p
static rsmi_status_t(* rsmi_counter_control_p)(rsmi_event_handle_t, rsmi_counter_command_t, void *)
Definition: rocs.c:73
pcie_table
static rsmi_pcie_bandwidth_t * pcie_table
Definition: rocs.c:330
rsmi_dev_overdrive_level_get_p
static rsmi_status_t(* rsmi_dev_overdrive_level_get_p)(uint32_t, uint32_t *)
Definition: rocs.c:31
acquire_devices
static int acquire_devices(unsigned int *, int, int32_t *)
Definition: rocs.c:955
rsmi_num_monitor_dev_p
static rsmi_status_t(* rsmi_num_monitor_dev_p)(uint32_t *)
Definition: rocs.c:13
rocs_gpu_clk_freq_subvariant_e
rocs_gpu_clk_freq_subvariant_e
Definition: rocs.c:128
ROCS_GPU_CLK_FREQ_SUBVARIANT__NUM
@ ROCS_GPU_CLK_FREQ_SUBVARIANT__NUM
Definition: rocs.c:131
ROCS_GPU_CLK_FREQ_SUBVARIANT__COUNT
@ ROCS_GPU_CLK_FREQ_SUBVARIANT__COUNT
Definition: rocs.c:129
ROCS_GPU_CLK_FREQ_SUBVARIANT__CURRENT
@ ROCS_GPU_CLK_FREQ_SUBVARIANT__CURRENT
Definition: rocs.c:130
start_simple
static int start_simple(void *)
Definition: rocs.c:2900
stop_xgmi_evt
static int stop_xgmi_evt(void *)
Definition: rocs.c:2999
access_rsmi_dev_unique_id
static int access_rsmi_dev_unique_id(rocs_access_mode_e, void *)
Definition: rocs.c:3175
ntv_table
static ntv_event_table_t ntv_table
Definition: rocs.c:324
rsmi_dev_counter_group_supported_p
static rsmi_status_t(* rsmi_dev_counter_group_supported_p)(uint32_t, rsmi_event_group_t)
Definition: rocs.c:70
handle_xgmi_events
static int handle_xgmi_events(int32_t dev, int *count, ntv_event_t *events)
Definition: rocs.c:1770
rocs_ctx_write
int rocs_ctx_write(rocs_ctx_t rocs_ctx, long long *counts)
Definition: rocs.c:624
rocs_err_get_last
int rocs_err_get_last(const char **err_string)
Definition: rocs.c:450
rsmi_counter_available_counters_get_p
static rsmi_status_t(* rsmi_counter_available_counters_get_p)(uint32_t, rsmi_event_group_t, uint32_t *)
Definition: rocs.c:75
access_rsmi_dev_busy_percent
static int access_rsmi_dev_busy_percent(rocs_access_mode_e, void *)
Definition: rocs.c:3349
rsmi_dev_drm_render_minor_get_p
static rsmi_status_t(* rsmi_dev_drm_render_minor_get_p)(uint32_t, uint32_t *)
Definition: rocs.c:30
rocs_event_type_e
rocs_event_type_e
Definition: rocs.c:1061
ROCS_EVENT_TYPE__SPECIAL
@ ROCS_EVENT_TYPE__SPECIAL
Definition: rocs.c:1063
ROCS_EVENT_TYPE__NORMAL
@ ROCS_EVENT_TYPE__NORMAL
Definition: rocs.c:1062
rsmi_dev_power_cap_set_p
static rsmi_status_t(* rsmi_dev_power_cap_set_p)(uint32_t, uint32_t, uint64_t)
Definition: rocs.c:51
handle_special_events
static int handle_special_events(const char *name, int32_t dev, int64_t variant, int64_t subvariant, int *count, ntv_event_t *events)
Definition: rocs.c:1485
rocs_evt_code_to_descr
int rocs_evt_code_to_descr(unsigned int event_code, char *descr, int len)
Definition: rocs.c:410
get_ntv_events
static int get_ntv_events(ntv_event_t *, int)
Definition: rocs.c:1183
get_start_func
static start_function_f get_start_func(const char *name)
Definition: rocs.c:2846
load_rsmi_sym
static int load_rsmi_sym(void)
Definition: rocs.c:665
rsmi_dev_supported_variant_iterator_open_p
static rsmi_status_t(* rsmi_dev_supported_variant_iterator_open_p)(rsmi_func_id_iter_handle_t, rsmi_func_id_iter_handle_t *)
Definition: rocs.c:18
rsmi_dev_ecc_status_get_p
static rsmi_status_t(* rsmi_dev_ecc_status_get_p)(uint32_t, rsmi_gpu_block_t, rsmi_ras_err_state_t *)
Definition: rocs.c:43
rsmi_dev_perf_level_get_p
static rsmi_status_t(* rsmi_dev_perf_level_get_p)(uint32_t, rsmi_dev_perf_level_t *)
Definition: rocs.c:37
access_rsmi_dev_ecc_count
static int access_rsmi_dev_ecc_count(rocs_access_mode_e, void *)
Definition: rocs.c:3682
rocs_xgmi_variant_e
rocs_xgmi_variant_e
Definition: rocs.c:142
ROCS_XGMI_VARIANT__MI50_1_RESPONSE_TX
@ ROCS_XGMI_VARIANT__MI50_1_RESPONSE_TX
Definition: rocs.c:151
ROCS_XGMI_VARIANT__MI50_0_NOP_TX
@ ROCS_XGMI_VARIANT__MI50_0_NOP_TX
Definition: rocs.c:145
ROCS_XGMI_VARIANT__MI100_DATA_OUT_4
@ ROCS_XGMI_VARIANT__MI100_DATA_OUT_4
Definition: rocs.c:157
ROCS_XGMI_VARIANT__MI50_0_RESPONSE_TX
@ ROCS_XGMI_VARIANT__MI50_0_RESPONSE_TX
Definition: rocs.c:147
ROCS_XGMI_VARIANT__MI100_DATA_OUT_0
@ ROCS_XGMI_VARIANT__MI100_DATA_OUT_0
Definition: rocs.c:153
ROCS_XGMI_VARIANT__MI50_1_NOP_TX
@ ROCS_XGMI_VARIANT__MI50_1_NOP_TX
Definition: rocs.c:149
ROCS_XGMI_VARIANT__MI50_0_REQUEST_TX
@ ROCS_XGMI_VARIANT__MI50_0_REQUEST_TX
Definition: rocs.c:146
ROCS_XGMI_VARIANT__MI50_1_REQUEST_TX
@ ROCS_XGMI_VARIANT__MI50_1_REQUEST_TX
Definition: rocs.c:150
ROCS_XGMI_VARIANT__MI50_0_BEATS_TX
@ ROCS_XGMI_VARIANT__MI50_0_BEATS_TX
Definition: rocs.c:148
ROCS_XGMI_VARIANT__MI100_DATA_OUT_5
@ ROCS_XGMI_VARIANT__MI100_DATA_OUT_5
Definition: rocs.c:158
ROCS_XGMI_VARIANT__MI50_1_BEATS_TX
@ ROCS_XGMI_VARIANT__MI50_1_BEATS_TX
Definition: rocs.c:152
ROCS_XGMI_VARIANT__MI100_DATA_OUT_1
@ ROCS_XGMI_VARIANT__MI100_DATA_OUT_1
Definition: rocs.c:154
ROCS_XGMI_VARIANT__MI100_DATA_OUT_3
@ ROCS_XGMI_VARIANT__MI100_DATA_OUT_3
Definition: rocs.c:156
ROCS_XGMI_VARIANT__MI100_DATA_OUT_2
@ ROCS_XGMI_VARIANT__MI100_DATA_OUT_2
Definition: rocs.c:155
rsmi_dev_counter_destroy_p
static rsmi_status_t(* rsmi_dev_counter_destroy_p)(rsmi_event_handle_t)
Definition: rocs.c:72
get_event_name
static char * get_event_name(const char *name, int32_t dev, int64_t variant, int64_t subvariant)
Definition: rocs.c:1856
access_rsmi_dev_memory_busy_percent
static int access_rsmi_dev_memory_busy_percent(rocs_access_mode_e, void *)
Definition: rocs.c:3330
rsmi_dev_power_cap_range_get_p
static rsmi_status_t(* rsmi_dev_power_cap_range_get_p)(uint32_t, uint32_t, uint64_t *, uint64_t *)
Definition: rocs.c:52
close_func_p
close_function_f close_func_p
Definition: rocs.c:227
rsmi_version_get_p
static rsmi_status_t(* rsmi_version_get_p)(rsmi_version_t *)
Definition: rocs.c:67
access_rsmi_dev_memory_usage
static int access_rsmi_dev_memory_usage(rocs_access_mode_e, void *)
Definition: rocs.c:3311
event_function_table
struct @6 event_function_table[]
rsmi_dev_pci_id_get_p
static rsmi_status_t(* rsmi_dev_pci_id_get_p)(uint32_t, uint64_t *)
Definition: rocs.c:56
rsmi_dev_pci_replay_counter_get_p
static rsmi_status_t(* rsmi_dev_pci_replay_counter_get_p)(uint32_t, uint64_t *)
Definition: rocs.c:58
access_rsmi_dev_pci_bandwidth
static int access_rsmi_dev_pci_bandwidth(rocs_access_mode_e, void *)
Definition: rocs.c:3796
htable
static void * htable
Definition: rocs.c:326
rsmi_dlp
static void * rsmi_dlp
Definition: rocs.c:323
access_rsmi_dev_subsystem_name
static int access_rsmi_dev_subsystem_name(rocs_access_mode_e, void *)
Definition: rocs.c:3903
rsmi_dev_gpu_clk_freq_set_p
static rsmi_status_t(* rsmi_dev_gpu_clk_freq_set_p)(uint32_t, rsmi_clk_type_t, uint64_t)
Definition: rocs.c:62
release_devices
static int release_devices(int32_t *)
Definition: rocs.c:979
rsmi_func_iter_next_p
static rsmi_status_t(* rsmi_func_iter_next_p)(rsmi_func_id_iter_handle_t)
Definition: rocs.c:15
stop_simple
static int stop_simple(void *)
rocs_evt_name_to_code
int rocs_evt_name_to_code(const char *name, unsigned int *event_code)
Definition: rocs.c:421
start_xgmi_evt
static int start_xgmi_evt(void *)
Definition: rocs.c:2984
get_close_func
static close_function_f get_close_func(const char *name)
Definition: rocs.c:2832
access_rsmi_dev_vendor_name
static int access_rsmi_dev_vendor_name(rocs_access_mode_e, void *)
Definition: rocs.c:3941
access_func_p
access_function_f access_func_p
Definition: rocs.c:230
stop_func_p
stop_function_f stop_func_p
Definition: rocs.c:229
rocs_ecc_count_subvariant_e
rocs_ecc_count_subvariant_e
Definition: rocs.c:113
ROCS_ECC_COUNT_SUBVARIANT__CORRECTABLE
@ ROCS_ECC_COUNT_SUBVARIANT__CORRECTABLE
Definition: rocs.c:114
ROCS_ECC_COUNT_SUBVARIANT__UNCORRECTABLE
@ ROCS_ECC_COUNT_SUBVARIANT__UNCORRECTABLE
Definition: rocs.c:115
ROCS_ECC_COUNT_SUBVARIANT__NUM
@ ROCS_ECC_COUNT_SUBVARIANT__NUM
Definition: rocs.c:116
access_rsmi_dev_driver_version_str
static int access_rsmi_dev_driver_version_str(rocs_access_mode_e, void *)
Definition: rocs.c:3099
access_rsmi_dev_overdrive_level
static int access_rsmi_dev_overdrive_level(rocs_access_mode_e, void *)
Definition: rocs.c:3232
get_access_mode
static rocs_access_mode_e get_access_mode(const char *)
Definition: rocs.c:2807
get_ntv_events_count
static int get_ntv_events_count(int *count)
Definition: rocs.c:1071
rocs_power_cap_range_variant_e
rocs_power_cap_range_variant_e
Definition: rocs.c:107
ROCS_POWER_CAP_RANGE_VARIANT__MIN
@ ROCS_POWER_CAP_RANGE_VARIANT__MIN
Definition: rocs.c:108
ROCS_POWER_CAP_RANGE_VARIANT__NUM
@ ROCS_POWER_CAP_RANGE_VARIANT__NUM
Definition: rocs.c:110
ROCS_POWER_CAP_RANGE_VARIANT__MAX
@ ROCS_POWER_CAP_RANGE_VARIANT__MAX
Definition: rocs.c:109
start_func_p
start_function_f start_func_p
Definition: rocs.c:228
rsmi_dev_fan_reset_p
static rsmi_status_t(* rsmi_dev_fan_reset_p)(uint32_t, uint32_t)
Definition: rocs.c:44
get_stop_func
static stop_function_f get_stop_func(const char *name)
Definition: rocs.c:2860
rsmi_dev_brand_get_p
static rsmi_status_t(* rsmi_dev_brand_get_p)(uint32_t, char *, uint32_t)
Definition: rocs.c:21
rsmi_shut_down_p
static rsmi_status_t(* rsmi_shut_down_p)(void)
Definition: rocs.c:66
open_func_p
open_function_f open_func_p
Definition: rocs.c:226
rsmi_dev_firmware_version_get_p
static rsmi_status_t(* rsmi_dev_firmware_version_get_p)(uint32_t, rsmi_fw_block_t, uint64_t *)
Definition: rocs.c:40
rsmi_dev_counter_create_p
static rsmi_status_t(* rsmi_dev_counter_create_p)(uint32_t, rsmi_event_type_t, rsmi_event_handle_t *)
Definition: rocs.c:71
access_rsmi_dev_gpu_clk_freq
static int access_rsmi_dev_gpu_clk_freq(rocs_access_mode_e, void *)
Definition: rocs.c:3749
rsmi_dev_memory_reserved_pages_get_p
static rsmi_status_t(* rsmi_dev_memory_reserved_pages_get_p)(uint32_t, uint32_t *, rsmi_retired_page_record_t *)
Definition: rocs.c:34
open_xgmi_evt
static int open_xgmi_evt(void *)
Definition: rocs.c:2914
access_rsmi_dev_brand
static int access_rsmi_dev_brand(rocs_access_mode_e, void *)
Definition: rocs.c:3846
rsmi_dev_unique_id_get_p
static rsmi_status_t(* rsmi_dev_unique_id_get_p)(uint32_t, uint64_t *)
Definition: rocs.c:20
open_simple
static int open_simple(void *)
rsmi_dev_od_volt_curve_regions_get_p
static rsmi_status_t(* rsmi_dev_od_volt_curve_regions_get_p)(uint32_t, uint32_t *, rsmi_freq_volt_region_t *)
Definition: rocs.c:63
access_rsmi_dev_fan_reset
static int access_rsmi_dev_fan_reset(rocs_access_mode_e, void *)
Definition: rocs.c:3492
access_rsmi_dev_power_profile_set
static int access_rsmi_dev_power_profile_set(rocs_access_mode_e, void *)
Definition: rocs.c:3471
access_rsmi_dev_memory_total
static int access_rsmi_dev_memory_total(rocs_access_mode_e, void *)
Definition: rocs.c:3292
rsmi_dev_pci_bandwidth_set_p
static rsmi_status_t(* rsmi_dev_pci_bandwidth_set_p)(uint32_t, uint64_t)
Definition: rocs.c:60
shutdown_device_table
static int shutdown_device_table(void)
Definition: rocs.c:1046
access_rsmi_dev_power_cap_range
static int access_rsmi_dev_power_cap_range(rocs_access_mode_e, void *)
Definition: rocs.c:3617
rsmi_dev_fan_speed_max_get_p
static rsmi_status_t(* rsmi_dev_fan_speed_max_get_p)(uint32_t, uint32_t, uint64_t *)
Definition: rocs.c:47
rsmi_dev_vendor_name_get_p
static rsmi_status_t(* rsmi_dev_vendor_name_get_p)(uint32_t, char *, size_t)
Definition: rocs.c:25
access_rsmi_lib_version
static int access_rsmi_lib_version(rocs_access_mode_e, void *)
Definition: rocs.c:3078
rocs_ctx_close
int rocs_ctx_close(rocs_ctx_t rocs_ctx)
Definition: rocs.c:519
rocs_pci_bw_variant_e
rocs_pci_bw_variant_e
Definition: rocs.c:134
ROCS_PCI_BW_VARIANT__COUNT
@ ROCS_PCI_BW_VARIANT__COUNT
Definition: rocs.c:135
ROCS_PCI_BW_VARIANT__RATE_IDX
@ ROCS_PCI_BW_VARIANT__RATE_IDX
Definition: rocs.c:137
ROCS_PCI_BW_VARIANT__NUM
@ ROCS_PCI_BW_VARIANT__NUM
Definition: rocs.c:139
ROCS_PCI_BW_VARIANT__CURRENT
@ ROCS_PCI_BW_VARIANT__CURRENT
Definition: rocs.c:136
ROCS_PCI_BW_VARIANT__LANE_IDX
@ ROCS_PCI_BW_VARIANT__LANE_IDX
Definition: rocs.c:138
handle_xgmi_events_count
static int handle_xgmi_events_count(int32_t dev, int *count)
Definition: rocs.c:1446
get_open_func
static open_function_f get_open_func(const char *name)
Definition: rocs.c:2818
rsmi_is_P2P_accessible_p
static rsmi_status_t(* rsmi_is_P2P_accessible_p)(uint32_t, uint32_t, int *)
Definition: rocs.c:76
rsmi_init_p
static rsmi_status_t(* rsmi_init_p)(uint64_t)
Definition: rocs.c:65
rsmi_dev_supported_func_iterator_open_p
static rsmi_status_t(* rsmi_dev_supported_func_iterator_open_p)(uint32_t, rsmi_func_id_iter_handle_t *)
Definition: rocs.c:16
access_rsmi_dev_pci_replay_counter
static int access_rsmi_dev_pci_replay_counter(rocs_access_mode_e, void *)
Definition: rocs.c:3387
rsmi_dev_memory_usage_get_p
static rsmi_status_t(* rsmi_dev_memory_usage_get_p)(uint32_t, rsmi_memory_type_t, uint64_t *)
Definition: rocs.c:36
access_rsmi_dev_name
static int access_rsmi_dev_name(rocs_access_mode_e, void *)
Definition: rocs.c:3865
rsmi_counter_read_p
static rsmi_status_t(* rsmi_counter_read_p)(rsmi_event_type_t, rsmi_counter_value_t *)
Definition: rocs.c:74
ntv_table_p
static ntv_event_table_t * ntv_table_p
Definition: rocs.c:325
access_xgmi_bw
static int access_xgmi_bw(rocs_access_mode_e, void *)
Definition: rocs.c:3035
rsmi_dev_overdrive_level_set_p
static rsmi_status_t(* rsmi_dev_overdrive_level_set_p)(uint32_t, uint32_t)
Definition: rocs.c:32
name
const char * name
Definition: rocs.c:225
rocs_init
int rocs_init(void)
Definition: rocs.c:333
rsmi_dev_power_cap_get_p
static rsmi_status_t(* rsmi_dev_power_cap_get_p)(uint32_t, uint32_t, uint64_t *)
Definition: rocs.c:50
access_rsmi_dev_count
static int access_rsmi_dev_count(rocs_access_mode_e, void *)
Definition: rocs.c:3065
rocs_shutdown
int rocs_shutdown(void)
Definition: rocs.c:655
access_rsmi_dev_firmware_version
static int access_rsmi_dev_firmware_version(rocs_access_mode_e, void *)
Definition: rocs.c:3663
get_event_descr
static char * get_event_descr(const char *name, int64_t variant, int64_t subvariant)
Definition: rocs.c:2365
access_rsmi_dev_serial_number
static int access_rsmi_dev_serial_number(rocs_access_mode_e, void *)
Definition: rocs.c:3884
rsmi_dev_memory_total_get_p
static rsmi_status_t(* rsmi_dev_memory_total_get_p)(uint32_t, rsmi_memory_type_t, uint64_t *)
Definition: rocs.c:35
access_rsmi_dev_vendor_id
static int access_rsmi_dev_vendor_id(rocs_access_mode_e, void *)
Definition: rocs.c:3156
access_rsmi_dev_temp_metric
static int access_rsmi_dev_temp_metric(rocs_access_mode_e, void *)
Definition: rocs.c:3646
close_function_f
int(* close_function_f)(void *arg)
Definition: rocs.c:219
access_rsmi_dev_power_profile_presets
static int access_rsmi_dev_power_profile_presets(rocs_access_mode_e, void *)
Definition: rocs.c:3439
init_device_table
static int init_device_table(void)
Definition: rocs.c:994
access_rsmi_dev_power_cap
static int access_rsmi_dev_power_cap(rocs_access_mode_e, void *)
Definition: rocs.c:3587
rocs_ctx_read
int rocs_ctx_read(rocs_ctx_t rocs_ctx, long long **counts)
Definition: rocs.c:605
access_rsmi_dev_ecc_status
static int access_rsmi_dev_ecc_status(rocs_access_mode_e, void *)
Definition: rocs.c:3730
PAPI_ROCMSMI_MAX_DEV_COUNT
#define PAPI_ROCMSMI_MAX_DEV_COUNT
Definition: rocs.c:313
rsmi_dev_vendor_id_get_p
static rsmi_status_t(* rsmi_dev_vendor_id_get_p)(uint32_t, uint16_t *)
Definition: rocs.c:26
rsmi_dev_vbios_version_get_p
static rsmi_status_t(* rsmi_dev_vbios_version_get_p)(uint32_t, char *, uint32_t)
Definition: rocs.c:24
rocs_ctx_start
int rocs_ctx_start(rocs_ctx_t rocs_ctx)
Definition: rocs.c:546
rocs_ctx_reset
int rocs_ctx_reset(rocs_ctx_t rocs_ctx)
Definition: rocs.c:642
rsmi_dev_ecc_enabled_get_p
static rsmi_status_t(* rsmi_dev_ecc_enabled_get_p)(uint32_t, uint64_t *)
Definition: rocs.c:42
rocs_power_presets_variant_e
rocs_power_presets_variant_e
Definition: rocs.c:100
ROCS_POWER_PRESETS_VARIANT__CURRENT
@ ROCS_POWER_PRESETS_VARIANT__CURRENT
Definition: rocs.c:103
ROCS_POWER_PRESETS_VARIANT__COUNT
@ ROCS_POWER_PRESETS_VARIANT__COUNT
Definition: rocs.c:101
ROCS_POWER_PRESETS_VARIANT__AVAIL_PROFILES
@ ROCS_POWER_PRESETS_VARIANT__AVAIL_PROFILES
Definition: rocs.c:102
ROCS_POWER_PRESETS_VARIANT__NUM
@ ROCS_POWER_PRESETS_VARIANT__NUM
Definition: rocs.c:104
rsmi_dev_od_volt_info_get_p
static rsmi_status_t(* rsmi_dev_od_volt_info_get_p)(uint32_t, rsmi_od_volt_freq_data_t *)
Definition: rocs.c:64
close_simple
static int close_simple(void *)
rsmi_dev_serial_number_get_p
static rsmi_status_t(* rsmi_dev_serial_number_get_p)(uint32_t, char *, uint32_t)
Definition: rocs.c:23
access_rsmi_dev_ecc_enabled
static int access_rsmi_dev_ecc_enabled(rocs_access_mode_e, void *)
Definition: rocs.c:3711
rsmi_minmax_bandwidth_get_p
static rsmi_status_t(* rsmi_minmax_bandwidth_get_p)(uint32_t, uint32_t, uint64_t *, uint64_t *)
Definition: rocs.c:77
rocs_ctx_open
int rocs_ctx_open(unsigned int *events_id, int num_events, rocs_ctx_t *rocs_ctx)
Definition: rocs.c:461
rsmi_func_iter_value_get_p
static rsmi_status_t(* rsmi_func_iter_value_get_p)(rsmi_func_id_iter_handle_t, rsmi_func_id_value_t *)
Definition: rocs.c:14
access_rsmi_dev_pci_throughput
static int access_rsmi_dev_pci_throughput(rocs_access_mode_e, void *)
Definition: rocs.c:3406
get_access_func
static access_function_f get_access_func(const char *name)
Definition: rocs.c:2874
rsmi_dev_fan_speed_set_p
static rsmi_status_t(* rsmi_dev_fan_speed_set_p)(uint32_t, uint32_t, uint64_t)
Definition: rocs.c:48
access_rsmi_dev_vbios_version
static int access_rsmi_dev_vbios_version(rocs_access_mode_e, void *)
Definition: rocs.c:3922
rocs_ctx_stop
int rocs_ctx_stop(rocs_ctx_t rocs_ctx)
Definition: rocs.c:580
access_rsmi_dev_pci_id
static int access_rsmi_dev_pci_id(rocs_access_mode_e, void *)
Definition: rocs.c:3368
rsmi_dev_perf_level_set_p
static rsmi_status_t(* rsmi_dev_perf_level_set_p)(int32_t, rsmi_dev_perf_level_t)
Definition: rocs.c:38
rocs_gpu_clk_freq_variant_e
rocs_gpu_clk_freq_variant_e
Definition: rocs.c:119
ROCS_GPU_CLK_FREQ_VARIANT__MEMORY
@ ROCS_GPU_CLK_FREQ_VARIANT__MEMORY
Definition: rocs.c:124
ROCS_GPU_CLK_FREQ_VARIANT__DATA_FABRIC
@ ROCS_GPU_CLK_FREQ_VARIANT__DATA_FABRIC
Definition: rocs.c:121
ROCS_GPU_CLK_FREQ_VARIANT__SYSTEM
@ ROCS_GPU_CLK_FREQ_VARIANT__SYSTEM
Definition: rocs.c:120
ROCS_GPU_CLK_FREQ_VARIANT__NUM
@ ROCS_GPU_CLK_FREQ_VARIANT__NUM
Definition: rocs.c:125
ROCS_GPU_CLK_FREQ_VARIANT__SOC
@ ROCS_GPU_CLK_FREQ_VARIANT__SOC
Definition: rocs.c:123
ROCS_GPU_CLK_FREQ_VARIANT__DISPLAY_ENGINE
@ ROCS_GPU_CLK_FREQ_VARIANT__DISPLAY_ENGINE
Definition: rocs.c:122
open_function_f
int(* open_function_f)(void *arg)
Definition: rocs.c:218
rsmi_dev_power_profile_set_p
static rsmi_status_t(* rsmi_dev_power_profile_set_p)(uint32_t, uint32_t, rsmi_power_profile_preset_masks_t)
Definition: rocs.c:54
rsmi_dev_fan_speed_get_p
static rsmi_status_t(* rsmi_dev_fan_speed_get_p)(uint32_t, uint32_t, int64_t *)
Definition: rocs.c:46
rsmi_dev_power_profile_presets_get_p
static rsmi_status_t(* rsmi_dev_power_profile_presets_get_p)(uint32_t, uint32_t, rsmi_power_profile_status_t *)
Definition: rocs.c:53
PAPI_ROCMSMI_MAX_SUBVAR
#define PAPI_ROCMSMI_MAX_SUBVAR
Definition: rocs.c:314
rsmi_dev_busy_percent_get_p
static rsmi_status_t(* rsmi_dev_busy_percent_get_p)(uint32_t, uint32_t *)
Definition: rocs.c:39
rocs_access_mode_e
rocs_access_mode_e
Definition: rocs.c:87
ROCS_ACCESS_MODE__RDWR
@ ROCS_ACCESS_MODE__RDWR
Definition: rocs.c:90
ROCS_ACCESS_MODE__WRITE
@ ROCS_ACCESS_MODE__WRITE
Definition: rocs.c:89
ROCS_ACCESS_MODE__READ
@ ROCS_ACCESS_MODE__READ
Definition: rocs.c:88
device_mask
static int32_t device_mask
Definition: rocs.c:456
rocs_evt_code_to_name
int rocs_evt_code_to_name(unsigned int event_code, char *name, int len)
Definition: rocs.c:440
rsmi_dev_name_get_p
static rsmi_status_t(* rsmi_dev_name_get_p)(uint32_t, char *, size_t)
Definition: rocs.c:22
rsmi_dev_memory_busy_percent_get_p
static rsmi_status_t(* rsmi_dev_memory_busy_percent_get_p)(uint32_t, uint32_t *)
Definition: rocs.c:33
stop_function_f
int(* stop_function_f)(void *arg)
Definition: rocs.c:221
rsmi_dev_subsystem_vendor_id_get_p
static rsmi_status_t(* rsmi_dev_subsystem_vendor_id_get_p)(uint32_t, uint16_t *)
Definition: rocs.c:28
access_rsmi_dev_drm_render_minor
static int access_rsmi_dev_drm_render_minor(rocs_access_mode_e, void *)
Definition: rocs.c:3213
access_rsmi_dev_subsystem_id
static int access_rsmi_dev_subsystem_id(rocs_access_mode_e, void *)
Definition: rocs.c:3194
rsmi_dev_id_get_p
static rsmi_status_t(* rsmi_dev_id_get_p)(uint32_t, uint16_t *)
Definition: rocs.c:19
init_event_table
static int init_event_table(void)
Definition: rocs.c:906
rsmi_dev_pci_bandwidth_get_p
static rsmi_status_t(* rsmi_dev_pci_bandwidth_get_p)(uint32_t, rsmi_pcie_bandwidth_t *)
Definition: rocs.c:59
access_rsmi_dev_fan_speed
static int access_rsmi_dev_fan_speed(rocs_access_mode_e, void *)
Definition: rocs.c:3548
rsmi_dev_ecc_count_get_p
static rsmi_status_t(* rsmi_dev_ecc_count_get_p)(uint32_t, rsmi_gpu_block_t, rsmi_error_count_t *)
Definition: rocs.c:41
unload_rsmi_sym
static int unload_rsmi_sym(void)
Definition: rocs.c:829
ROCMSMI_NUM_INFO_EVENTS
#define ROCMSMI_NUM_INFO_EVENTS
Definition: rocs.c:1059
rsmi_dev_temp_metric_get_p
static rsmi_status_t(* rsmi_dev_temp_metric_get_p)(uint32_t, uint32_t, rsmi_temperature_metric_t, int64_t *)
Definition: rocs.c:55
rsmi_dev_power_avg_get_p
static rsmi_status_t(* rsmi_dev_power_avg_get_p)(uint32_t, uint32_t, uint64_t *)
Definition: rocs.c:49
_rocm_smi_lock
unsigned int _rocm_smi_lock
Definition: rocs.c:11
access_rsmi_dev_fan_rpms
static int access_rsmi_dev_fan_rpms(rocs_access_mode_e, void *)
Definition: rocs.c:3512
rsmi_dev_supported_func_iterator_close_p
static rsmi_status_t(* rsmi_dev_supported_func_iterator_close_p)(rsmi_func_id_iter_handle_t *)
Definition: rocs.c:17
rsmi_dev_gpu_clk_freq_get_p
static rsmi_status_t(* rsmi_dev_gpu_clk_freq_get_p)(uint32_t, rsmi_clk_type_t, rsmi_frequencies_t *)
Definition: rocs.c:61
error_string
static char error_string[PAPI_MAX_STR_LEN+1]
Definition: rocs.c:327
close_xgmi_evt
static int close_xgmi_evt(void *)
Definition: rocs.c:2969
shutdown_event_table
static int shutdown_event_table(void)
Definition: rocs.c:940
access_rsmi_dev_subsystem_vendor_id
static int access_rsmi_dev_subsystem_vendor_id(rocs_access_mode_e, void *)
Definition: rocs.c:3137
handle_special_events_count
static int handle_special_events_count(const char *v_name, int32_t dev, int64_t v_variant, int64_t v_subvariant, int *count)
Definition: rocs.c:1345
rsmi_version_str_get_p
static rsmi_status_t(* rsmi_version_str_get_p)(rsmi_sw_component_t, char *, size_t)
Definition: rocs.c:68
start_function_f
int(* start_function_f)(void *arg)
Definition: rocs.c:220
access_rsmi_dev_id
static int access_rsmi_dev_id(rocs_access_mode_e, void *)
Definition: rocs.c:3118
device_count
static int32_t device_count
Definition: rocs.c:328
rsmi_dev_subsystem_name_get_p
static rsmi_status_t(* rsmi_dev_subsystem_name_get_p)(uint32_t, char *, size_t)
Definition: rocs.c:29
access_rsmi_dev_power_ave
static int access_rsmi_dev_power_ave(rocs_access_mode_e, void *)
Definition: rocs.c:3568
access_rsmi_dev_fan_speed_max
static int access_rsmi_dev_fan_speed_max(rocs_access_mode_e, void *)
Definition: rocs.c:3529
rocs_evt_enum
int rocs_evt_enum(unsigned int *event_code, int modifier)
Definition: rocs.c:384
rsmi_status_string_p
static rsmi_status_t(* rsmi_status_string_p)(rsmi_status_t, const char **)
Definition: rocs.c:69
access_rsmi_dev_perf_level
static int access_rsmi_dev_perf_level(rocs_access_mode_e, void *)
Definition: rocs.c:3262
rsmi_dev_subsystem_id_get_p
static rsmi_status_t(* rsmi_dev_subsystem_id_get_p)(uint32_t, uint16_t *)
Definition: rocs.c:27
access_xgmi_evt
static int access_xgmi_evt(rocs_access_mode_e, void *)
Definition: rocs.c:3014
access_function_f
int(* access_function_f)(rocs_access_mode_e mode, void *arg)
Definition: rocs.c:222
freq_table
static rsmi_frequencies_t * freq_table
Definition: rocs.c:329
rsmi_dev_fan_rpms_get_p
static rsmi_status_t(* rsmi_dev_fan_rpms_get_p)(uint32_t, uint32_t, int64_t *)
Definition: rocs.c:45
rsmi_dev_pci_throughput_get_p
static rsmi_status_t(* rsmi_dev_pci_throughput_get_p)(uint32_t, uint64_t *, uint64_t *, uint64_t *)
Definition: rocs.c:57
ROCS_EVENTS_OPENED
#define ROCS_EVENTS_OPENED
Definition: rocs.h:4
ROCS_EVENTS_RUNNING
#define ROCS_EVENTS_RUNNING
Definition: rocs.h:5
int
int
Definition: sde_internal.h:89
ntv_event_t
Definition: perfctr-ppc64.h:165
ntv_event_t::variant
int64_t variant
Definition: rocs.c:288
ntv_event_t::open_func_p
open_function_f open_func_p
Definition: rocs.c:293
ntv_event_t::stop_func_p
stop_function_f stop_func_p
Definition: rocs.c:296
ntv_event_t::access_func_p
access_function_f access_func_p
Definition: rocs.c:297
ntv_event_t::close_func_p
close_function_f close_func_p
Definition: rocs.c:294
ntv_event_t::name
char * name
Definition: roc_profiler.c:43
ntv_event_t::descr
char * descr
Definition: roc_profiler.c:44
ntv_event_t::device
int32_t device
Definition: rocs.c:287
ntv_event_t::start_func_p
start_function_f start_func_p
Definition: rocs.c:295
ntv_event_t::subvariant
int64_t subvariant
Definition: rocs.c:289
ntv_event_t::value
int64_t value
Definition: rocs.c:290
ntv_event_t::mode
rocs_access_mode_e mode
Definition: rocs.c:292
ntv_event_t::id
unsigned int id
Definition: rocs.c:284
ntv_event_table_t
Definition: roc_profiler.c:49
ntv_event_table_t::events
ntv_event_t * events
Definition: roc_profiler.c:50
ntv_event_table_t::count
int count
Definition: roc_profiler.c:51
rocs_ctx
Definition: rocs.c:305
rocs_ctx::device_mask
int32_t device_mask
Definition: rocs.c:310
rocs_ctx::num_events
int num_events
Definition: rocs.c:308
rocs_ctx::counters
int64_t * counters
Definition: rocs.c:309
rocs_ctx::state
int state
Definition: rocs.c:306
rocs_ctx::events_id
unsigned int * events_id
Definition: rocs.c:307
_papi_hwi_lock
inline_static int _papi_hwi_lock(int lck)
Definition: threads.h:69
_papi_hwi_unlock
inline_static int _papi_hwi_unlock(int lck)
Definition: threads.h:83
descr
char * descr
Definition: vendor_profiler_v1.c:57