Publications

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Filters: Author is Robert Harrison  [Clear All Filters]
2021
Herault, T., Y. Robert, G. Bosilca, R. Harrison, C. Lewis, E. Valeev, and J. Dongarra, “Distributed-Memory Multi-GPU Block-Sparse Tensor Contraction for Electronic Structure,” 35th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2021), Portland, OR, IEEE, May 2021.
2020
Bosilca, G., R. Harrison, T. Herault, M. Mahdi Javanmard, P. Nookala, and E. Valeev, “The Template Task Graph (TTG) - An Emerging Practical Dataflow Programming Paradigm for Scientific Simulation at Extreme Scale,” 2020 IEEE/ACM 5th International Workshop on Extreme Scale Programming Models and Middleware (ESPM2): IEEE, November 2020. DOI: 10.1109/ESPM251964.2020.00011  (139.6 KB)
2018
Bosilca, G., D. Genet, R. Harrison, T. Herault, M. Mahdi Javanmard, C. Peng, and E. Valeev, “Tensor Contraction on Distributed Hybrid Architectures using a Task-Based Runtime System,” Innovative Computing Laboratory Technical Report, no. ICL-UT-18-13: University of Tennessee, December 2018.  (326.11 KB)
2011
Dongarra, J., P. Beckman, T. Moore, P. Aerts, G. Aloisio, J-C. Andre, D. Barkai, J-Y. Berthou, T. Boku, B. Braunschweig, et al., “The International Exascale Software Project Roadmap,” International Journal of High Performance Computing, vol. 25, no. 1, pp. 3-60, January 2011. DOI: 10.1177/1094342010391989  (719.74 KB)
2004