PAPI 7.1.0.0
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arm_cpu_utils.c
Go to the documentation of this file.
1#include <stdio.h>
2#include "sysdetect.h"
3#include "arm_cpu_utils.h"
4#include "os_cpu_utils.h"
5#include <string.h>
6
7#define VENDOR_ARM_ARM 65
8#define VENDOR_ARM_BROADCOM 66
9#define VENDOR_ARM_CAVIUM 67
10#define VENDOR_ARM_FUJITSU 70
11#define VENDOR_ARM_HISILICON 72
12#define VENDOR_ARM_APM 80
13#define VENDOR_ARM_QUALCOMM 81
14#define NAMEID_ARM_1176 0xb76
15#define NAMEID_ARM_CORTEX_A7 0xc07
16#define NAMEID_ARM_CORTEX_A8 0xc08
17#define NAMEID_ARM_CORTEX_A9 0xc09
18#define NAMEID_ARM_CORTEX_A15 0xc0f
19#define NAMEID_ARM_CORTEX_A53 0xd03
20#define NAMEID_ARM_CORTEX_A57 0xd07
21#define NAMEID_ARM_CORTEX_A76 0xd0b
22#define NAMEID_ARM_NEOVERSE_N1 0xd0c
23#define NAMEID_ARM_NEOVERSE_N2 0xd49
24#define NAMEID_ARM_NEOVERSE_V1 0xd40
25#define NAMEID_ARM_NEOVERSE_V2 0xd4f
26#define NAMEID_BROADCOM_THUNDERX2 0x516
27#define NAMEID_CAVIUM_THUNDERX2 0x0af
28#define NAMEID_FUJITSU_A64FX 0x001
29#define NAMEID_HISILICON_KUNPENG 0xd01
30#define NAMEID_APM_XGENE 0x000
31#define NAMEID_QUALCOMM_KRAIT 0x040
32
34 { // level 1 begins
35 2,
36 {
37 {PAPI_MH_TYPE_INST, 65536, 256, 64, 4},
38 {PAPI_MH_TYPE_DATA, 65536, 256, 64, 4}
39 }
40 },
41 { // level 2 begins
42 1,
43 {
44 {PAPI_MH_TYPE_UNIFIED, 8388608, 256, 2048, 16},
45 {PAPI_MH_TYPE_EMPTY, -1, -1, -1, -1}
46 }
47 },
48};
49
50static int get_cache_info( CPU_attr_e attr, int level, int *value );
51static int name_id_arm_cpu_get_name( int name_id, char *name );
52static int name_id_broadcom_cpu_get_name( int name_id, char *name );
53static int name_id_cavium_cpu_get_name( int name_id, char *name );
54static int name_id_fujitsu_cpu_get_name( int name_id, char *name );
55static int name_id_hisilicon_cpu_get_name( int name_id, char *name );
56static int name_id_apm_cpu_get_name( int name_id, char *name );
57static int name_id_qualcomm_cpu_get_name( int name_id, char *name );
58
59int
61{
62 return CPU_SUCCESS;
63}
64
65int
67{
68 return CPU_SUCCESS;
69}
70
71int
72arm_cpu_get_vendor( char *vendor )
73{
74 int papi_errno;
75
77 papi_errno = os_cpu_get_vendor(tmp);
78 if (papi_errno != PAPI_OK) {
79 return papi_errno;
80 }
81
82 int vendor_id;
83 sscanf(tmp, "%x", &vendor_id);
84
85 switch(vendor_id) {
86 case VENDOR_ARM_ARM:
87 strcpy(vendor, "Arm");
88 break;
90 strcpy(vendor, "Broadcom");
91 break;
93 strcpy(vendor, "Cavium");
94 break;
96 strcpy(vendor, "Fujitsu");
97 break;
99 strcpy(vendor, "Hisilicon");
100 break;
101 case VENDOR_ARM_APM:
102 strcpy(vendor, "Apm");
103 break;
105 strcpy(vendor, "Qualcomm");
106 break;
107 default:
108 papi_errno = PAPI_ENOSUPP;
109 }
110
111 return papi_errno;
112}
113
114int
116{
117 int papi_errno;
118
119 papi_errno = os_cpu_get_name(name);
120 if (strlen(name) != 0) {
121 return papi_errno;
122 }
123
124 char tmp[PAPI_MAX_STR_LEN];
125 papi_errno = os_cpu_get_vendor(tmp);
126 if (papi_errno != PAPI_OK) {
127 return papi_errno;
128 }
129
130 int vendor_id;
131 sscanf(tmp, "%x", &vendor_id);
132
133 int name_id;
134 papi_errno = os_cpu_get_attribute(CPU_ATTR__CPUID_MODEL, &name_id);
135 if (papi_errno != PAPI_OK) {
136 return papi_errno;
137 }
138
139 switch(vendor_id) {
140 case VENDOR_ARM_ARM:
141 papi_errno = name_id_arm_cpu_get_name(name_id, name);
142 break;
144 papi_errno = name_id_broadcom_cpu_get_name(name_id, name);
145 break;
147 papi_errno = name_id_cavium_cpu_get_name(name_id, name);
148 break;
150 papi_errno = name_id_fujitsu_cpu_get_name(name_id, name);
151 break;
153 papi_errno = name_id_hisilicon_cpu_get_name(name_id, name);
154 break;
155 case VENDOR_ARM_APM:
156 papi_errno = name_id_apm_cpu_get_name(name_id, name);
157 break;
159 papi_errno = name_id_qualcomm_cpu_get_name(name_id, name);
160 break;
161 default:
162 papi_errno = PAPI_ENOSUPP;
163 }
164
165 return papi_errno;
166}
167
168int
170{
171 return os_cpu_get_attribute(attr, value);
172}
173
174int
175arm_cpu_get_attribute_at( CPU_attr_e attr, int loc, int *value )
176{
177 int status = CPU_SUCCESS;
178
179 switch(attr) {
181 //fall through
183 //fall through
185 //fall through
187 //fall through
189 //fall through
191 //fall through
193 //fall through
195 //fall through
197 //fall through
199 //fall through
201 //fall through
203 //fall through
205 //fall through
207 //fall through
209 status = get_cache_info(attr, loc, value);
210 break;
212 //fall through
214 status = os_cpu_get_attribute_at(attr, loc, value);
215 break;
216 default:
217 status = CPU_ERROR;
218 }
219
220 return status;
221}
222
223int
224name_id_arm_cpu_get_name( int name_id, char *name )
225{
226 int papi_errno = PAPI_OK;
227
228 switch(name_id) {
229 case NAMEID_ARM_1176:
230 strcpy(name, "ARM1176");
231 break;
233 strcpy(name, "ARM Cortex A7");
234 break;
236 strcpy(name, "ARM Cortex A8");
237 break;
239 strcpy(name, "ARM Cortex A9");
240 break;
242 strcpy(name, "ARM Cortex A15");
243 break;
245 strcpy(name, "ARM Cortex A53");
246 break;
248 strcpy(name, "ARM Cortex A57");
249 break;
251 strcpy(name, "ARM Cortex A76");
252 break;
254 strcpy(name, "ARM Neoverse N1");
255 break;
257 strcpy(name, "ARM Neoverse N2");
258 break;
260 strcpy(name, "ARM Neoverse V1");
261 break;
263 strcpy(name, "ARM Neoverse V2");
264 break;
265 default:
266 papi_errno = PAPI_ENOSUPP;
267 }
268
269 return papi_errno;
270}
271
272int
274{
275 int papi_errno = PAPI_OK;
276
277 switch(name_id) {
279 strcpy(name, "Broadcom ThunderX2");
280 break;
281 default:
282 papi_errno = PAPI_ENOSUPP;
283 }
284
285 return papi_errno;
286}
287
288int
290{
291 int papi_errno = PAPI_OK;
292
293 switch(name_id) {
295 strcpy(name, "Cavium ThunderX2");
296 break;
297 default:
298 papi_errno = PAPI_ENOSUPP;
299 }
300
301 return papi_errno;
302}
303
304int
306{
307 int papi_errno = PAPI_OK;
308
309 switch(name_id) {
311 strcpy(name, "Fujitsu A64FX");
312 break;
313 default:
314 papi_errno = PAPI_ENOSUPP;
315 }
316
317 return papi_errno;
318}
319
320int
322{
323 int papi_errno = PAPI_OK;
324
325 switch(name_id) {
327 strcpy(name, "Hisilicon Kunpeng");
328 break;
329 default:
330 papi_errno = PAPI_ENOSUPP;
331 }
332
333 return papi_errno;
334}
335
336int
337name_id_apm_cpu_get_name( int name_id, char *name )
338{
339 int papi_errno = PAPI_OK;
340
341 switch(name_id) {
342 case NAMEID_APM_XGENE:
343 strcpy(name, "Applied Micro X-Gene");
344 break;
345 default:
346 papi_errno = PAPI_ENOSUPP;
347 }
348
349 return papi_errno;
350}
351
352int
354{
355 int papi_errno = PAPI_OK;
356
357 switch(name_id) {
359 strcpy(name, "ARM Qualcomm Krait");
360 break;
361 default:
362 papi_errno = PAPI_ENOSUPP;
363 }
364
365 return papi_errno;
366}
367
368int
369get_cache_info( CPU_attr_e attr, int level, int *value )
370{
371 int impl, part;
372 unsigned int implementer, partnum;
373 static _sysdetect_cache_level_info_t *clevel_ptr;
374
375 int status;
377 if( status != CPU_SUCCESS ) return CPU_ERROR;
378 implementer = impl;
379
381 if( status != CPU_SUCCESS ) return CPU_ERROR;
382 partnum = part;
383
384 if (clevel_ptr) {
385 return cpu_get_cache_info(attr, level, clevel_ptr, value);
386 }
387
388 switch ( implementer ) {
390 if ( NAMEID_FUJITSU_A64FX == partnum ) { /* Fujitsu A64FX */
391 clevel_ptr = fujitsu_a64fx_cache_info;
392 } else {
393 return CPU_ERROR;
394 }
395 break;
396 default:
397 return CPU_ERROR;
398 }
399
400 return cpu_get_cache_info(attr, level, clevel_ptr, value);
401}
double tmp
#define NAMEID_ARM_NEOVERSE_N1
Definition: arm_cpu_utils.c:22
#define NAMEID_ARM_CORTEX_A7
Definition: arm_cpu_utils.c:15
#define NAMEID_ARM_NEOVERSE_V1
Definition: arm_cpu_utils.c:24
static int name_id_hisilicon_cpu_get_name(int name_id, char *name)
static int name_id_arm_cpu_get_name(int name_id, char *name)
#define NAMEID_ARM_CORTEX_A15
Definition: arm_cpu_utils.c:18
static int name_id_broadcom_cpu_get_name(int name_id, char *name)
#define NAMEID_APM_XGENE
Definition: arm_cpu_utils.c:30
#define NAMEID_ARM_NEOVERSE_V2
Definition: arm_cpu_utils.c:25
#define VENDOR_ARM_CAVIUM
Definition: arm_cpu_utils.c:9
int arm_cpu_get_attribute(CPU_attr_e attr, int *value)
int arm_cpu_get_name(char *name)
static int name_id_fujitsu_cpu_get_name(int name_id, char *name)
#define NAMEID_ARM_CORTEX_A57
Definition: arm_cpu_utils.c:20
#define VENDOR_ARM_HISILICON
Definition: arm_cpu_utils.c:11
#define NAMEID_ARM_1176
Definition: arm_cpu_utils.c:14
static int name_id_cavium_cpu_get_name(int name_id, char *name)
#define NAMEID_HISILICON_KUNPENG
Definition: arm_cpu_utils.c:29
int arm_cpu_finalize(void)
Definition: arm_cpu_utils.c:66
_sysdetect_cache_level_info_t fujitsu_a64fx_cache_info[]
Definition: arm_cpu_utils.c:33
#define VENDOR_ARM_BROADCOM
Definition: arm_cpu_utils.c:8
#define VENDOR_ARM_ARM
Definition: arm_cpu_utils.c:7
int arm_cpu_get_attribute_at(CPU_attr_e attr, int loc, int *value)
#define NAMEID_ARM_NEOVERSE_N2
Definition: arm_cpu_utils.c:23
int arm_cpu_get_vendor(char *vendor)
Definition: arm_cpu_utils.c:72
#define NAMEID_ARM_CORTEX_A76
Definition: arm_cpu_utils.c:21
#define NAMEID_ARM_CORTEX_A8
Definition: arm_cpu_utils.c:16
#define VENDOR_ARM_QUALCOMM
Definition: arm_cpu_utils.c:13
static int name_id_apm_cpu_get_name(int name_id, char *name)
#define NAMEID_ARM_CORTEX_A9
Definition: arm_cpu_utils.c:17
static int get_cache_info(CPU_attr_e attr, int level, int *value)
#define NAMEID_BROADCOM_THUNDERX2
Definition: arm_cpu_utils.c:26
int arm_cpu_init(void)
Definition: arm_cpu_utils.c:60
#define VENDOR_ARM_FUJITSU
Definition: arm_cpu_utils.c:10
#define NAMEID_FUJITSU_A64FX
Definition: arm_cpu_utils.c:28
#define NAMEID_CAVIUM_THUNDERX2
Definition: arm_cpu_utils.c:27
#define VENDOR_ARM_APM
Definition: arm_cpu_utils.c:12
#define NAMEID_QUALCOMM_KRAIT
Definition: arm_cpu_utils.c:31
#define NAMEID_ARM_CORTEX_A53
Definition: arm_cpu_utils.c:19
static int name_id_qualcomm_cpu_get_name(int name_id, char *name)
int cpu_get_cache_info(CPU_attr_e attr, int level, _sysdetect_cache_level_info_t *clevel_ptr, int *value)
Definition: cpu_utils.c:94
#define CPU_ERROR
Definition: cpu_utils.h:5
#define CPU_SUCCESS
Definition: cpu_utils.h:4
CPU_attr_e
Definition: cpu_utils.h:7
@ CPU_ATTR__CPUID_MODEL
Definition: cpu_utils.h:14
@ CPU_ATTR__CACHE_INST_TOT_SIZE
Definition: cpu_utils.h:21
@ CPU_ATTR__HWTHREAD_NUMA_AFFINITY
Definition: cpu_utils.h:34
@ CPU_ATTR__CACHE_UNIF_TOT_SIZE
Definition: cpu_utils.h:29
@ CPU_ATTR__CACHE_DATA_ASSOCIATIVITY
Definition: cpu_utils.h:28
@ CPU_ATTR__CACHE_INST_LINE_SIZE
Definition: cpu_utils.h:22
@ CPU_ATTR__NUMA_MEM_SIZE
Definition: cpu_utils.h:36
@ CPU_ATTR__CACHE_UNIF_LINE_SIZE
Definition: cpu_utils.h:30
@ CPU_ATTR__CACHE_DATA_NUM_LINES
Definition: cpu_utils.h:27
@ CPU_ATTR__CACHE_UNIF_ASSOCIATIVITY
Definition: cpu_utils.h:32
@ CPU_ATTR__CACHE_INST_PRESENT
Definition: cpu_utils.h:18
@ CPU_ATTR__CACHE_DATA_PRESENT
Definition: cpu_utils.h:19
@ CPU_ATTR__CACHE_DATA_LINE_SIZE
Definition: cpu_utils.h:26
@ CPU_ATTR__CACHE_INST_ASSOCIATIVITY
Definition: cpu_utils.h:24
@ CPU_ATTR__CACHE_INST_NUM_LINES
Definition: cpu_utils.h:23
@ CPU_ATTR__CACHE_UNIF_NUM_LINES
Definition: cpu_utils.h:31
@ CPU_ATTR__CACHE_DATA_TOT_SIZE
Definition: cpu_utils.h:25
@ CPU_ATTR__VENDOR_ID
Definition: cpu_utils.h:12
@ CPU_ATTR__CACHE_UNIF_PRESENT
Definition: cpu_utils.h:20
#define PAPI_OK
Definition: f90papi.h:73
#define PAPI_ENOSUPP
Definition: f90papi.h:244
#define PAPI_MAX_STR_LEN
Definition: f90papi.h:77
int os_cpu_get_attribute(CPU_attr_e attr, int *value)
Definition: os_cpu_utils.c:30
int os_cpu_get_vendor(char *vendor)
Definition: os_cpu_utils.c:6
int os_cpu_get_attribute_at(CPU_attr_e attr, int loc, int *value)
Definition: os_cpu_utils.c:42
int os_cpu_get_name(char *name)
Definition: os_cpu_utils.c:18
#define PAPI_MH_TYPE_DATA
Definition: papi.h:720
#define PAPI_MH_TYPE_INST
Definition: papi.h:719
#define PAPI_MH_TYPE_EMPTY
Definition: papi.h:718
#define PAPI_MH_TYPE_UNIFIED
Definition: papi.h:723
const char * name
Definition: rocs.c:225