News and Announcements
Jack Earns HPDC Achievement Award
Jack Dongarra has been honored for his groundbreaking contributions to HPC with the 2016 High Performance Parallel and Distributed Computing (HPDC) Achievement Award. Jack recently accepted the award at the 25th annual Association for Computing Machinery’s HPDC conference in Kyoto, Japan.
The HPDC conference established the annual achievement award to recognize leading computer scientists who have made long-lasting and influential contributions to the foundation or practice of high-performance parallel and distributed computing and for seminal contributions and a sustained record of high-impact in the field.
The award reflects achievements in one or more of the following areas:
- Conceptual advances that have influenced the design or operation of HPDC systems or applications.
- Innovative techniques or tools for the design or analysis of HPDC systems or applications.
- The design, implementation, and deployment of HPDC systems, applications, and innovative components.
- The analysis of innovative HPDC systems or applications including components.
“It’s an honor to have our pioneering work in the area of high performance computing recognized by the HPDC community,” Dongarra said. “At the same time, the award calls attention to the impact a long-term commitment to experimental computer science work can have on scientific discovery in domains ranging from economics to high energy physics and from human health to geology.”
Congratulations, Jack!
Dongarra named ISC ’17 Program Chair
On May 23rd, the ISC Group named ICL’s Jack Dongarra as the Program Chairman for ISC 2017. The International Supercomputing Conference (ISC High Performance) is held annually in Germany as the European counterpart to SC. As the program chair, Jack will take a leading roll with the ISC program team in defining the 2017 program. In addition, Jack will be working with the steering committee in a longer multi-year effort to further increase the exposure of the ISC High Performance endeavor and of the HPC community in general. Congratulations, Jack!
Conference Reports
Batched BLAS Workshop
On May 18-19, 2016, ICL hosted the Workshop on Batched, Reproducible, and Reduced Precision BLAS (BBLAS) in Knoxville, TN. This workshop focused on extending the Basic Linear Algebra Software Library (BLAS) to provide greater parallelism for small size operations, reproducibility, and reduced precision support, and serves as the beginning of a forum to discuss and formalize details related to batched, reproducible, and reduced precision BLAS. As one might imagine, many ICLers—mostly from the Numerical Linear Algebra group—were on hand to present their latest work with BLAS. A full agenda with slides is available on the workshop website.
BBLAS also served as a reunion of sorts since several of the participants have spent time at ICL throughout the years, including Sven Hammarling, Greg Henry, Hatem Ltaief, and Clint Whaley.
TESSE Group Meeting
On May 4, 2016, ICL’s George Bosilca, Amina Guermouche, and Thomas Herault went to New York, New York as part of the annual meeting for the collaborative TESSE project.
The goal of TESSE (Task-based Environment for Scientific Simulation at Extreme Scale) is to use an application-driven design to create a general-purpose production-quality software framework that attacks the twin challenges of programmer productivity and portable performance for advanced scientific applications on massively-parallel, hybrid, many-core systems of today and tomorrow.
The TESSE team is composed of researchers from Stonybrook, Virginia Tech, and ICL/UTK. Pictured above from left-to-right: Scott Thornton (Stonybrook), George Bosilca (ICL), Ed Valeev (Virginia Tech), Robert Harrison (Stonybrook), Amina Guermouche (ICL), Thomas Herault (ICL), and Mahdi Javanamard (Stonybrook).
IPDPS 2016
On May 23-27, Piotr Luszczek, George Bosilca, and Ahmad Ahmad made their way to Chicago, Illinois for the 30th IEEE International Parallel & Distributed Processing Symposium (IPDPS). IPDPS is an international forum for engineers and scientists from around the world to present their latest research findings in all aspects of parallel computation. In addition to technical sessions of submitted paper presentations, the meeting offers workshops, tutorials, and commercial presentations and exhibits.
Piotr participated in the Sixth International Workshop on Accelerators and Hybrid Exascale Systems (AsHES) on Monday, where he contributed to a tutorial on “Heterogeneous Streaming,” and then presented a paper, “Hessenberg Reduction with Transient Error Resilience on GPU-Based Hybrid Architectures.” Piotr also presented Hartwig’s paper on “Efficiency of General Krylov Methods on GPUs – An Experimental Study,” and served as chair for the Workload Scheduling session. On Friday, Piotr took part in the 11th International Workshop on Automatic Performance Tuning (iWAPT) where he presented the paper, “Search Space Generation and Pruning System for Autotuners.”
George gave a keynote presentation, “Undisrupted Applications,” at the 17th IEEE International Workshop on Parallel and Distributed Scientific and Engineering Computing (PDSEC). Ahmad was also at PDSEC where he presented his paper, “On the Development of Variable Size Batched Computation for Heterogeneous Parallel Architectures.”
Interview
David Eberius
Where are you from, originally?
I am from Bel Air, Maryland which is just north of Baltimore.
Can you summarize your educational background?
I completed my undergraduate studies at a small school in Maryland called Salisbury University with a major in Computer Science and a minor in Mathematics.
Tell us how you first learned about ICL.
I was looking into schools with strong HPC backgrounds and I found UTK. When I was looking into professors to study under, I saw Dr. Dongarra and ICL and I thought it would be a great fit.
What made you want to work for ICL?
I wanted to improve my knowledge of HPC and eventually become an expert. I have found that ICL is definitely an ideal place for me to learn.
What are you working on while at ICL?
Right now I am primarily working on code profiling. More specifically, I am working on the profiling system within PaRSEC to allow for PAPI performance counters to be used during execution. Recently I started working on a PAPI component that will allow users to track software-based events from outside libraries such as OpenMPI.
If you weren’t working at ICL, where would you like to be working and why?
Since I am still a graduate student, if I weren’t working at ICL, I would like to work as a TA because I want to teach at the university level someday.
What are your interests/hobbies outside work?
I enjoy watching movies and TV shows, particularly anime. I also like playing video games, doing video editing, and reading. One of my favorite books right now is The Name of the Wind by Patrick Rothfuss. I also love whistling, and as it turns out, I will be competing in the World Whistlers Convention this summer in Japan.
Tell us something about yourself that might surprise people.
Before choosing Computer Science for my major, I wanted to pursue English and eventually write short stories and novels professionally.
