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Title | Assessing General-purpose Algorithms to Cope with Fail-stop and Silent Errors |
Publication Type | Journal Article |
Year of Publication | 2016 |
Authors | Benoit, A., A. Cavelan, Y. Robert, and H. Sun |
Journal | ACM Transactions on Parallel Computing |
Date Published | 2016-08 |
Keywords | checkpoint, fail-stop error, failure, HPC, resilience, silent data corruption, silent error, verification |
Abstract | In this paper, we combine the traditional checkpointing and rollback recovery strategies with verification mechanisms to cope with both fail-stop and silent errors. The objective is to minimize makespan and/or energy consumption. For divisible load applications, we use first-order approximations to find the optimal checkpointing period to minimize execution time, with an additional verification mechanism to detect silent errors before each checkpoint, hence extending the classical formula by Young and Daly for fail-stop errors only. We further extend the approach to include intermediate verifications, and to consider a bi-criteria problem involving both time and energy (linear combination of execution time and energy consumption). Then, we focus on application workflows whose dependence graph is a linear chain of tasks. Here, we determine the optimal checkpointing and verification locations, with or without intermediate verifications, for the bicriteria problem. Rather than using a single speed during the whole execution, we further introduce a new execution scenario, which allows for changing the execution speed via dynamic voltage and frequency scaling (DVFS). We determine in this scenario the optimal checkpointing and verification locations, as well as the optimal speed pairs. Finally, we conduct an extensive set of simulations to support the theoretical study, and to assess the performance of each algorithm, showing that the best overall performance is achieved under the most flexible scenario using intermediate verifications and different speeds. |
DOI | 10.1145/2897189 |
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