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Macros | |
| #define | __stringify_1(x) #x |
| #define | __stringify(x) __stringify_1(x) |
| #define | mfspr(rn) |
| #define | SPRN_PVR 0x11F /* Processor Version Register */ |
| #define | SPRN_MMCR0 795 |
| #define | MMCR0_FC 0x80000000UL /* freeze counters */ |
| #define | MMCR0_FCS 0x40000000UL /* freeze in supervisor state */ |
| #define | MMCR0_KERNEL_DISABLE MMCR0_FCS |
| #define | MMCR0_FCP 0x20000000UL /* freeze in problem state */ |
| #define | MMCR0_PROBLEM_DISABLE MMCR0_FCP |
| #define | MMCR0_FCM1 0x10000000UL /* freeze counters while MSR mark = 1 */ |
| #define | MMCR0_FCM0 0x08000000UL /* freeze counters while MSR mark = 0 */ |
| #define | MMCR0_PMXE 0x04000000UL /* performance monitor exception enable */ |
| #define | MMCR0_FCECE 0x02000000UL /* freeze ctrs on enabled cond or event */ |
| #define | MMCR0_TBEE 0x00400000UL /* time base exception enable */ |
| #define | MMCR0_PMC1CE 0x00008000UL /* PMC1 count enable*/ |
| #define | MMCR0_PMCjCE 0x00004000UL /* PMCj count enable*/ |
| #define | MMCR0_TRIGGER 0x00002000UL /* TRIGGER enable */ |
| #define | MMCR0_PMAO 0x00000080UL /* performance monitor alert has occurred, set to 0 after handling exception */ |
| #define | MMCR0_SHRFC 0x00000040UL /* SHRre freeze conditions between threads */ |
| #define | MMCR0_FC1_4 0x00000020UL /* freeze counters 1 - 4 on POWER5/5+ */ |
| #define | MMCR0_FC5_6 0x00000010UL /* freeze counters 5 & 6 on POWER5/5+ */ |
| #define | MMCR0_FCTI 0x00000008UL /* freeze counters in tags inactive mode */ |
| #define | MMCR0_FCTA 0x00000004UL /* freeze counters in tags active mode */ |
| #define | MMCR0_FCWAIT 0x00000002UL /* freeze counter in WAIT state */ |
| #define | MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */ |
| #define | SPRN_MMCR1 798 |
| #define | SPRN_MMCRA 0x312 |
| #define | MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */ |
| #define | MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */ |
| #define | MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */ |
| #define | SPRN_PMC1 787 |
| #define | SPRN_PMC2 788 |
| #define | SPRN_PMC3 789 |
| #define | SPRN_PMC4 790 |
| #define | SPRN_PMC5 791 |
| #define | SPRN_PMC6 792 |
| #define | SPRN_PMC7 793 |
| #define | SPRN_PMC8 794 |
| #define | SPRN_SIAR 780 |
| #define | SPRN_SDAR 781 |
| #define | PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */ |
| #define | PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */ |
| #define | __is_processor(pv) (PVR_VER(mfspr(SPRN_PVR)) == (pv)) |
| #define | PV_NORTHSTAR 0x0033 |
| #define | PV_PULSAR 0x0034 |
| #define | PV_POWER4 0x0035 |
| #define | PV_ICESTAR 0x0036 |
| #define | PV_SSTAR 0x0037 |
| #define | PV_POWER4p 0x0038 |
| #define | PV_970 0x0039 |
| #define | PV_POWER5 0x003A |
| #define | PV_POWER5p 0x003B |
| #define | PV_970FX 0x003C |
| #define | PV_POWER6 0x003E |
| #define | PV_POWER7 0x003F |
| #define | PV_630 0x0040 |
| #define | PV_630p 0x0041 |
| #define | PV_970MP 0x0044 |
| #define | PV_970GX 0x0045 |
| #define | PV_BE 0x0070 |
Macro Definition Documentation
◆ __is_processor
Definition at line 65 of file powerpc_reg.h.
◆ __stringify
| #define __stringify | ( | x | ) | __stringify_1(x) |
Definition at line 12 of file powerpc_reg.h.
◆ __stringify_1
Definition at line 11 of file powerpc_reg.h.
◆ mfspr
| #define mfspr | ( | rn | ) |
Definition at line 14 of file powerpc_reg.h.
◆ MMCR0_FC
| #define MMCR0_FC 0x80000000UL /* freeze counters */ |
Definition at line 23 of file powerpc_reg.h.
◆ MMCR0_FC1_4
| #define MMCR0_FC1_4 0x00000020UL /* freeze counters 1 - 4 on POWER5/5+ */ |
Definition at line 38 of file powerpc_reg.h.
◆ MMCR0_FC5_6
| #define MMCR0_FC5_6 0x00000010UL /* freeze counters 5 & 6 on POWER5/5+ */ |
Definition at line 39 of file powerpc_reg.h.
◆ MMCR0_FCECE
| #define MMCR0_FCECE 0x02000000UL /* freeze ctrs on enabled cond or event */ |
Definition at line 31 of file powerpc_reg.h.
◆ MMCR0_FCHV
| #define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */ |
Definition at line 43 of file powerpc_reg.h.
◆ MMCR0_FCM0
| #define MMCR0_FCM0 0x08000000UL /* freeze counters while MSR mark = 0 */ |
Definition at line 29 of file powerpc_reg.h.
◆ MMCR0_FCM1
| #define MMCR0_FCM1 0x10000000UL /* freeze counters while MSR mark = 1 */ |
Definition at line 28 of file powerpc_reg.h.
◆ MMCR0_FCP
| #define MMCR0_FCP 0x20000000UL /* freeze in problem state */ |
Definition at line 26 of file powerpc_reg.h.
◆ MMCR0_FCS
| #define MMCR0_FCS 0x40000000UL /* freeze in supervisor state */ |
Definition at line 24 of file powerpc_reg.h.
◆ MMCR0_FCTA
| #define MMCR0_FCTA 0x00000004UL /* freeze counters in tags active mode */ |
Definition at line 41 of file powerpc_reg.h.
◆ MMCR0_FCTI
| #define MMCR0_FCTI 0x00000008UL /* freeze counters in tags inactive mode */ |
Definition at line 40 of file powerpc_reg.h.
◆ MMCR0_FCWAIT
| #define MMCR0_FCWAIT 0x00000002UL /* freeze counter in WAIT state */ |
Definition at line 42 of file powerpc_reg.h.
◆ MMCR0_KERNEL_DISABLE
| #define MMCR0_KERNEL_DISABLE MMCR0_FCS |
Definition at line 25 of file powerpc_reg.h.
◆ MMCR0_PMAO
| #define MMCR0_PMAO 0x00000080UL /* performance monitor alert has occurred, set to 0 after handling exception */ |
Definition at line 36 of file powerpc_reg.h.
◆ MMCR0_PMC1CE
| #define MMCR0_PMC1CE 0x00008000UL /* PMC1 count enable*/ |
Definition at line 33 of file powerpc_reg.h.
◆ MMCR0_PMCjCE
| #define MMCR0_PMCjCE 0x00004000UL /* PMCj count enable*/ |
Definition at line 34 of file powerpc_reg.h.
◆ MMCR0_PMXE
| #define MMCR0_PMXE 0x04000000UL /* performance monitor exception enable */ |
Definition at line 30 of file powerpc_reg.h.
◆ MMCR0_PROBLEM_DISABLE
| #define MMCR0_PROBLEM_DISABLE MMCR0_FCP |
Definition at line 27 of file powerpc_reg.h.
◆ MMCR0_SHRFC
| #define MMCR0_SHRFC 0x00000040UL /* SHRre freeze conditions between threads */ |
Definition at line 37 of file powerpc_reg.h.
◆ MMCR0_TBEE
| #define MMCR0_TBEE 0x00400000UL /* time base exception enable */ |
Definition at line 32 of file powerpc_reg.h.
◆ MMCR0_TRIGGER
| #define MMCR0_TRIGGER 0x00002000UL /* TRIGGER enable */ |
Definition at line 35 of file powerpc_reg.h.
◆ MMCRA_SAMPLE_ENABLE
| #define MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */ |
Definition at line 48 of file powerpc_reg.h.
◆ MMCRA_SIHV
| #define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */ |
Definition at line 46 of file powerpc_reg.h.
◆ MMCRA_SIPR
| #define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */ |
Definition at line 47 of file powerpc_reg.h.
◆ PV_630
| #define PV_630 0x0040 |
Definition at line 81 of file powerpc_reg.h.
◆ PV_630p
| #define PV_630p 0x0041 |
Definition at line 82 of file powerpc_reg.h.
◆ PV_970
| #define PV_970 0x0039 |
Definition at line 75 of file powerpc_reg.h.
◆ PV_970FX
| #define PV_970FX 0x003C |
Definition at line 78 of file powerpc_reg.h.
◆ PV_970GX
| #define PV_970GX 0x0045 |
Definition at line 84 of file powerpc_reg.h.
◆ PV_970MP
| #define PV_970MP 0x0044 |
Definition at line 83 of file powerpc_reg.h.
◆ PV_BE
| #define PV_BE 0x0070 |
Definition at line 85 of file powerpc_reg.h.
◆ PV_ICESTAR
| #define PV_ICESTAR 0x0036 |
Definition at line 72 of file powerpc_reg.h.
◆ PV_NORTHSTAR
| #define PV_NORTHSTAR 0x0033 |
Definition at line 69 of file powerpc_reg.h.
◆ PV_POWER4
| #define PV_POWER4 0x0035 |
Definition at line 71 of file powerpc_reg.h.
◆ PV_POWER4p
| #define PV_POWER4p 0x0038 |
Definition at line 74 of file powerpc_reg.h.
◆ PV_POWER5
| #define PV_POWER5 0x003A |
Definition at line 76 of file powerpc_reg.h.
◆ PV_POWER5p
| #define PV_POWER5p 0x003B |
Definition at line 77 of file powerpc_reg.h.
◆ PV_POWER6
| #define PV_POWER6 0x003E |
Definition at line 79 of file powerpc_reg.h.
◆ PV_POWER7
| #define PV_POWER7 0x003F |
Definition at line 80 of file powerpc_reg.h.
◆ PV_PULSAR
| #define PV_PULSAR 0x0034 |
Definition at line 70 of file powerpc_reg.h.
◆ PV_SSTAR
| #define PV_SSTAR 0x0037 |
Definition at line 73 of file powerpc_reg.h.
◆ PVR_REV
| #define PVR_REV | ( | pvr | ) | (((pvr) >> 0) & 0xFFFF) /* Revison field */ |
Definition at line 63 of file powerpc_reg.h.
◆ PVR_VER
| #define PVR_VER | ( | pvr | ) | (((pvr) >> 16) & 0xFFFF) /* Version field */ |
Definition at line 62 of file powerpc_reg.h.
◆ SPRN_MMCR0
| #define SPRN_MMCR0 795 |
Definition at line 22 of file powerpc_reg.h.
◆ SPRN_MMCR1
| #define SPRN_MMCR1 798 |
Definition at line 44 of file powerpc_reg.h.
◆ SPRN_MMCRA
| #define SPRN_MMCRA 0x312 |
Definition at line 45 of file powerpc_reg.h.
◆ SPRN_PMC1
| #define SPRN_PMC1 787 |
Definition at line 49 of file powerpc_reg.h.
◆ SPRN_PMC2
| #define SPRN_PMC2 788 |
Definition at line 50 of file powerpc_reg.h.
◆ SPRN_PMC3
| #define SPRN_PMC3 789 |
Definition at line 51 of file powerpc_reg.h.
◆ SPRN_PMC4
| #define SPRN_PMC4 790 |
Definition at line 52 of file powerpc_reg.h.
◆ SPRN_PMC5
| #define SPRN_PMC5 791 |
Definition at line 53 of file powerpc_reg.h.
◆ SPRN_PMC6
| #define SPRN_PMC6 792 |
Definition at line 54 of file powerpc_reg.h.
◆ SPRN_PMC7
| #define SPRN_PMC7 793 |
Definition at line 55 of file powerpc_reg.h.
◆ SPRN_PMC8
| #define SPRN_PMC8 794 |
Definition at line 56 of file powerpc_reg.h.
◆ SPRN_PVR
| #define SPRN_PVR 0x11F /* Processor Version Register */ |
Definition at line 19 of file powerpc_reg.h.
◆ SPRN_SDAR
| #define SPRN_SDAR 781 |
Definition at line 58 of file powerpc_reg.h.
◆ SPRN_SIAR
| #define SPRN_SIAR 780 |
Definition at line 57 of file powerpc_reg.h.
