Optimizing the SVD Bidiagonalization Process for a Batch of Small Matrices

TitleOptimizing the SVD Bidiagonalization Process for a Batch of Small Matrices
Publication TypeConference Paper
Year of Publication2017
AuthorsDong, T., A. Haidar, S. Tomov, and J. Dongarra
Conference NameInternational Conference on Computational Science (ICCS 2017)
Date Published2017-06
PublisherProcedia Computer Science
Conference LocationZurich, Switzerland
AbstractA challenging class of problems arising in many GPU applications, called batched problems, involves linear algebra operations on many small-sized matrices. We designed batched BLAS (Basic Linear Algebra Subroutines) routines, and in particular the Level-2 BLAS GEMV and the Level-3 BLAS GEMM routines, to solve them. We proposed device functions and big-tile settings in our batched BLAS design. We adopted auto-tuning to optimize different instances of GEMV routines. We illustrated our batched BLAS approach to optimize batched bi-diagonalization progressively on a K40c GPU. The optimization techniques in this paper are applicable to the other two-sided factorizations as well.
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