35 .pme_desc =
"count core clock cycles whenever the clock signal on the specific core is running (not halted)"
37 {.pme_name =
"INSTRUCTIONS_RETIRED",
40 .pme_desc =
"count the number of instructions at retirement. For instructions that consists of multiple micro-ops, this event counts the retirement of the last micro-op of the instruction",
42 {.pme_name =
"UNHALTED_REFERENCE_CYCLES",
45 .pme_desc =
"count reference clock cycles while the clock signal on the specific core is running. The reference clock operates at a fixed frequency, irrespective of core freqeuncy changes due to performance state transitions",
47 {.pme_name =
"LAST_LEVEL_CACHE_REFERENCES",
49 .pme_desc =
"count each request originating from the core to reference a cache line in the last level cache. The count may include speculation, but excludes cache line fills due to hardware prefetch",
51 {.pme_name =
"LAST_LEVEL_CACHE_MISSES",
53 .pme_desc =
"count each cache miss condition for references to the last level cache. The event count may include speculation, but excludes cache line fills due to hardware prefetch",
55 {.pme_name =
"BRANCH_INSTRUCTIONS_RETIRED",
57 .pme_desc =
"count branch instructions at retirement. Specifically, this event counts the retirement of the last micro-op of a branch instruction",
59 {.pme_name =
"MISPREDICTED_BRANCH_RETIRED",
61 .pme_desc =
"count mispredicted branch instructions at retirement. Specifically, this event counts at retirement of the last micro-op of a branch instruction in the architectural path of the execution and experienced misprediction in the branch prediction hardware",
64#define PME_GEN_IA32_UNHALTED_CORE_CYCLES 0
65#define PME_GEN_IA32_INSTRUCTIONS_RETIRED 1
66#define PFMLIB_GEN_IA32_EVENT_COUNT (sizeof(gen_ia32_all_pe)/sizeof(pme_gen_ia32_entry_t))
static pme_gen_ia32_entry_t gen_ia32_all_pe[]