PAPI 7.1.0.0
Loading...
Searching...
No Matches
pfmlib_sicortex.h
Go to the documentation of this file.
1/*
2 * Generic MIPS64 PMU specific types and definitions
3 *
4 * Contributed by Philip Mucci <mucci@cs.utk.edu> based on code from
5 * Copyright (c) 2005-2006 Hewlett-Packard Development Company, L.P.
6 * Contributed by Stephane Eranian <eranian@hpl.hp.com>
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
12 * of the Software, and to permit persons to whom the Software is furnished to do so,
13 * subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in all
16 * copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
19 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
20 * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
21 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
22 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
23 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#ifndef __PFMLIB_SICORTEX_H__
27#define __PFMLIB_SICORTEX_H__
28
29#include <endian.h> /* MIPS are bi-endian */
30
31#include <perfmon/pfmlib.h>
32/*
33 * privilege level mask usage for MIPS:
34 *
35 * PFM_PLM0 = KERNEL
36 * PFM_PLM1 = SUPERVISOR
37 * PFM_PLM2 = INTERRUPT
38 * PFM_PLM3 = USER
39 */
40
41#ifdef __cplusplus
42extern "C" {
43#endif
44
45/*
46 * SiCortex specific
47 */
48
49typedef union {
50 uint64_t val; /* complete register value */
51 struct {
52 unsigned long sel_exl:1; /* int level */
53 unsigned long sel_os:1; /* system level */
54 unsigned long sel_sup:1; /* supervisor level */
55 unsigned long sel_usr:1; /* user level */
56 unsigned long sel_int:1; /* enable intr */
57 unsigned long sel_event_mask:6; /* event mask */
58 unsigned long sel_res1:23; /* reserved */
59 unsigned long sel_res2:32; /* reserved */
60 } perfsel;
62
63#define PMU_SICORTEX_SCB_NUM_COUNTERS 256
64
65typedef union {
66 uint64_t val;
67 struct {
68 unsigned long Interval:4;
69 unsigned long IntBit:5;
70 unsigned long NoInc:1;
71 unsigned long AddrAssert:1;
72 unsigned long MagicEvent:2;
73 unsigned long Reserved:19;
74 } sicortex_ScbPerfCtl_reg;
75 struct {
76 unsigned long HistGte:20;
77 unsigned long Reserved:12;
78 } sicortex_ScbPerfHist_reg;
79 struct {
80 unsigned long Bucket:8;
81 unsigned long Reserved:24;
82 } sicortex_ScbPerfBuckNum_reg;
83 struct {
84 unsigned long ena:1;
85 unsigned long Reserved:31;
86 } sicortex_ScbPerfEna_reg;
87 struct {
88 unsigned long event:15;
89 unsigned long hist:1;
90 unsigned long ifOther:2;
91 unsigned long Reserved:15;
92 } sicortex_ScbPerfBucket_reg;
94
95typedef union {
96 uint64_t val;
97 struct {
98 unsigned long Reserved:2;
99 uint64_t VPCL:38;
100 unsigned long VPCH:2;
101 } sicortex_CpuPerfVPC_reg;
102 struct {
103 unsigned long Reserved:5;
104 unsigned long PEA:31;
105 unsigned long Reserved2:12;
106 unsigned long ASID:8;
107 unsigned long L2STOP:4;
108 unsigned long L2STATE:3;
109 unsigned long L2HIT:1;
110 } sicortex_CpuPerfPEA_reg;
112
113typedef struct {
114 unsigned long NoInc:1;
115 unsigned long Interval:4;
116 unsigned long HistGte:20;
117 unsigned long Bucket:8;
119
120typedef struct {
121 unsigned long ifOther:2;
122 unsigned long hist:1;
124
125#define PFMLIB_SICORTEX_INPUT_SCB_NONE (unsigned long)0x0
126#define PFMLIB_SICORTEX_INPUT_SCB_INTERVAL (unsigned long)0x1
127#define PFMLIB_SICORTEX_INPUT_SCB_NOINC (unsigned long)0x2
128#define PFMLIB_SICORTEX_INPUT_SCB_HISTGTE (unsigned long)0x4
129#define PFMLIB_SICORTEX_INPUT_SCB_BUCKET (unsigned long)0x8
130
131typedef struct {
132 unsigned long flags;
136
137typedef struct {
138 unsigned long reserved;
140
141/* CPU counter */
142int pfm_sicortex_is_cpu(unsigned int i);
143/* SCB counter */
144int pfm_sicortex_is_scb(unsigned int i);
145/* Reg 25 domain support */
146int pfm_sicortex_support_domain(unsigned int i);
147/* VPC/PEA sampling support */
148int pfm_sicortex_support_vpc_pea(unsigned int i);
149
150#ifdef __cplusplus /* extern C */
151}
152#endif
153
154#endif /* __PFMLIB_GEN_MIPS64_H__ */
int i
#define PMU_SICORTEX_SCB_NUM_COUNTERS
int pfm_sicortex_is_cpu(unsigned int i)
int pfm_sicortex_support_domain(unsigned int i)
int pfm_sicortex_support_vpc_pea(unsigned int i)
int pfm_sicortex_is_scb(unsigned int i)
pfmlib_sicortex_scb_t pfp_sicortex_scb_global
unsigned long sel_event_mask
unsigned long MagicEvent
unsigned long AddrAssert