PAPI 7.1.0.0
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pfmlib_cell.c
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1/*
2 * pfmlib_cell.c : support for the Cell PMU family
3 *
4 * Copyright (c) 2007 TOSHIBA CORPORATION based on code from
5 * Copyright (c) 2001-2006 Hewlett-Packard Development Company, L.P.
6 * Contributed by Stephane Eranian <eranian@hpl.hp.com>
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
12 * of the Software, and to permit persons to whom the Software is furnished to do so,
13 * subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in all
16 * copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
19 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
20 * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
21 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
22 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
23 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25#include <sys/types.h>
26#include <ctype.h>
27#include <string.h>
28#include <stdio.h>
29#include <stdlib.h>
30
31/* public headers */
32#include <perfmon/pfmlib_cell.h>
33
34/* private headers */
35#include "pfmlib_priv.h" /* library private */
36#include "pfmlib_cell_priv.h" /* architecture private */
37#include "cell_events.h" /* PMU private */
38
39#define SIGNAL_TYPE_CYCLES 0
40#define PM_COUNTER_CTRL_CYLES 0x42C00000U
41
42#define PFM_CELL_NUM_PMCS 24
43#define PFM_CELL_EVENT_MIN 1
44#define PFM_CELL_EVENT_MAX 8
45#define PMX_MIN_NUM 1
46#define PMX_MAX_NUM 8
47#define PFM_CELL_16BIT_CNTR_EVENT_MAX 8
48#define PFM_CELL_32BIT_CNTR_EVENT_MAX 4
49
50#define COMMON_REG_NUMS 8
51
52#define ENABLE_WORD0 0
53#define ENABLE_WORD1 1
54#define ENABLE_WORD2 2
55
56#define PFM_CELL_GRP_CONTROL_REG_GRP0_BIT 30
57#define PFM_CELL_GRP_CONTROL_REG_GRP1_BIT 28
58#define PFM_CELL_BASE_WORD_UNIT_FIELD_BIT 24
59#define PFM_CELL_WORD_UNIT_FIELD_WIDTH 2
60#define PFM_CELL_MAX_WORD_NUMBER 3
61#define PFM_CELL_COUNTER_CONTROL_GRP1 0x80000000U
62#define PFM_CELL_DEFAULT_TRIGGER_EVENT_UNIT 0x00555500U
63#define PFM_CELL_PM_CONTROL_16BIT_CNTR_MASK 0x01E00000U
64#define PFM_CELL_PM_CONTROL_PPU_CNTR_MODE_PROBLEM 0x00080000U
65#define PFM_CELL_PM_CONTROL_PPU_CNTR_MODE_SUPERVISOR 0x00000000U
66#define PFM_CELL_PM_CONTROL_PPU_CNTR_MODE_HYPERVISOR 0x00040000U
67#define PFM_CELL_PM_CONTROL_PPU_CNTR_MODE_ALL 0x000C0000U
68#define PFM_CELL_PM_CONTROL_PPU_CNTR_MODE_MASK 0x000C0000U
69
70#define ONLY_WORD(x) \
71 ((x == WORD_0_ONLY)||(x == WORD_2_ONLY)) ? x : 0
72
74 unsigned int signal_type;
75 unsigned int word_type;
76 unsigned long long word;
77 unsigned long long freq;
78 unsigned int subunit;
79};
80
81#define swap_int(num1, num2) do { \
82 int tmp = num1; \
83 num1 = num2; \
84 num2 = tmp; \
85} while(0)
86
87static int
89{
90 int ret;
91 char buffer[128];
92
93 ret = __pfm_getcpuinfo_attr("cpu", buffer, sizeof(buffer));
94 if (ret == -1) {
95 return PFMLIB_ERR_NOTSUPP;
96 }
97 if (strcmp(buffer, "Cell Broadband Engine, altivec supported")) {
98 return PFMLIB_ERR_NOTSUPP;
99 }
100
101 return PFMLIB_SUCCESS;
102}
103
104static int
105get_pmx_offset(int pmx_num, unsigned int *pmx_ctrl_bits)
106{
107 /* pmx_num==0 -> not specified
108 * pmx_num==1 -> pm0
109 * :
110 * pmx_num==8 -> pm7
111 */
112 int i = 0;
113 int offset;
114
115 if ((pmx_num >= PMX_MIN_NUM) && (pmx_num <= PMX_MAX_NUM)) {
116 /* offset is specified */
117 offset = (pmx_num - 1);
118
119 if ((~*pmx_ctrl_bits >> offset) & 0x1) {
120 *pmx_ctrl_bits |= (0x1 << offset);
121 return offset;
122 } else {
123 /* offset is used */
124 return PFMLIB_ERR_INVAL;
125 }
126 } else if (pmx_num == 0){
127 /* offset is not specified */
128 while (((*pmx_ctrl_bits >> i) & 0x1) && (i < PMX_MAX_NUM)) {
129 i++;
130 }
131 *pmx_ctrl_bits |= (0x1 << i);
132 return i;
133 }
134 /* pmx_num is invalid */
135 return PFMLIB_ERR_INVAL;
136}
137
138static unsigned long long
140{
141 unsigned long long count = 0;
142
143 while ((~word) & 0x1) {
144 count++;
145 word >>= 1;
146 }
147 return count;
148}
149
150static int get_count_bit(unsigned int type)
151{
152 int count = 0;
153
154 while(type) {
155 if (type & 1) {
156 count++;
157 }
158 type >>= 1;
159 }
160 return count;
161}
162
163
164static int
166{
167 unsigned int word_type0, word_type1;
168
169 /* search enable word */
170 word_type0 = group0->word_type;
171 word_type1 = group1->word_type;
172
173 if (group1->signal_type == NONE_SIGNAL) {
174 group0->word = search_enable_word(word_type0);
175 goto found;
176 }
177
178 /* swap */
179 if ((get_count_bit(word_type0) > get_count_bit(word_type1)) ||
180 (group0->freq == PFM_CELL_PME_FREQ_SPU)) {
181 swap_int(group0->signal_type, group1->signal_type);
182 swap_int(group0->freq, group1->freq);
183 swap_int(group0->word_type, group1->word_type);
184 swap_int(group0->subunit, group1->subunit);
185 swap_int(word_type0, word_type1);
186 }
187
188 if ((ONLY_WORD(word_type0) != 0) && (word_type0 == word_type1)) {
189 return PFMLIB_ERR_INVAL;
190 }
191
192 if (ONLY_WORD(word_type0)) {
193 group0->word = search_enable_word(ONLY_WORD(word_type0));
194
195 word_type1 &= ~(1UL << (group0->word));
196 group1->word = search_enable_word(word_type1);
197 } else if (ONLY_WORD(word_type1)) {
198 group1->word = search_enable_word(ONLY_WORD(word_type1));
199
200 word_type0 &= ~(1UL << (group1->word));
201 group0->word = search_enable_word(word_type0);
202 } else {
203 group0->word = ENABLE_WORD0;
204 if (word_type1 == WORD_0_AND_1) {
205 group1->word = ENABLE_WORD1;
206 } else if(word_type1 == WORD_0_AND_2) {
207 group1->word = ENABLE_WORD2;
208 } else {
209 return PFMLIB_ERR_INVAL;
210 }
211 }
212
213found:
214 return PFMLIB_SUCCESS;
215}
216
217static unsigned int get_signal_type(unsigned long long event_code)
218{
219 return (event_code & 0x00000000FFFFFFFFULL) / 100;
220}
221
222static unsigned int get_signal_bit(unsigned long long event_code)
223{
224 return (event_code & 0x00000000FFFFFFFFULL) % 100;
225}
226
227static int is_spe_signal_group(unsigned int signal_type)
228{
229 if (41 <= signal_type && signal_type <= 56) {
230 return 1;
231 } else {
232 return 0;
233 }
234}
235
236static int
239 struct pfm_cell_signal_group_desc *group0,
240 struct pfm_cell_signal_group_desc *group1)
241{
243 unsigned int event_cnt;
244 int signal_cnt = 0;
245 int i;
246 int cycles_signal_cnt = 0;
247 unsigned int signal_type, subunit;
248
249 e = inp->pfp_events;
250 event_cnt = inp->pfp_event_count;
251
252 for(i = 0; i < event_cnt; i++) {
253 signal_type = get_signal_type(cell_pe[e[i].event].pme_code);
254
255 if ((signal_type == SIGNAL_SPU_TRIGGER)
256 || (signal_type == SIGNAL_SPU_EVENT)) {
257 continue;
258 }
259
260 if (signal_type == SIGNAL_TYPE_CYCLES) {
261 cycles_signal_cnt = 1;
262 continue;
263 }
264
265 subunit = 0;
266 if (is_spe_signal_group(signal_type)) {
267 subunit = mod_in->pfp_cell_counters[i].spe_subunit;
268 }
269 switch(signal_cnt) {
270 case 0:
271 group0->signal_type = signal_type;
273 group0->freq = cell_pe[e[i].event].pme_freq;
274 group0->subunit = subunit;
275 signal_cnt++;
276 break;
277
278 case 1:
279 if ((group0->signal_type != signal_type) ||
280 (is_spe_signal_group(signal_type) && group0->subunit != subunit)) {
281 group1->signal_type = signal_type;
283 group1->freq = cell_pe[e[i].event].pme_freq;
284 group1->subunit = subunit;
285 signal_cnt++;
286
287 }
288 break;
289
290 case 2:
291 if ((group0->signal_type != signal_type)
292 && (group1->signal_type != signal_type)) {
293 DPRINT("signal count is invalid\n");
294 return PFMLIB_ERR_INVAL;
295 }
296 break;
297
298 default:
299 DPRINT("signal count is invalid\n");
300 return PFMLIB_ERR_INVAL;
301 }
302 }
303 return (signal_cnt + cycles_signal_cnt);
304}
305
306/*
307 * The assignment between the privilege leve options
308 * and ppu-count-mode field in pm_control register.
309 *
310 * option ppu count mode(pm_control)
311 * ---------------------------------
312 * -u(-3) 0b10 : Problem mode
313 * -k(-0) 0b00 : Supervisor mode
314 * -1 0b00 : Supervisor mode
315 * -2 0b01 : Hypervisor mode
316 * two options 0b11 : Any mode
317 *
318 * Note : Hypervisor-mode and Any-mode don't work on PS3.
319 *
320 */
321static unsigned int get_ppu_count_mode(unsigned int plm)
322{
323 unsigned int ppu_count_mode = 0;
324
325 switch (plm) {
326 case PFM_PLM0:
327 case PFM_PLM1:
329 break;
330
331 case PFM_PLM2:
333 break;
334
335 case PFM_PLM3:
337 break;
338
339 default :
341 break;
342 }
343 return ppu_count_mode;
344}
345
346static int
350{
352 pfmlib_reg_t *pc, *pd;
353 unsigned int event_cnt;
354 unsigned int signal_cnt = 0, pmcs_cnt = 0;
355 unsigned int signal_type;
356 unsigned long long signal_bit;
357 struct pfm_cell_signal_group_desc group[2];
358 int pmx_offset = 0;
359 int i, ret;
360 int input_control, polarity, count_cycle, count_enable;
361 unsigned long long subunit;
362 int shift0, shift1;
363 unsigned int pmx_ctrl_bits;
364 int max_event_cnt = PFM_CELL_32BIT_CNTR_EVENT_MAX;
365
366 count_enable = 1;
367
368 group[0].signal_type = group[1].signal_type = NONE_SIGNAL;
369 group[0].word = group[1].word = 0L;
370 group[0].freq = group[1].freq = 0L;
371 group[0].subunit = group[1].subunit = 0;
372 group[0].word_type = group[1].word_type = WORD_NONE;
373
374 event_cnt = inp->pfp_event_count;
375 e = inp->pfp_events;
376 pc = outp->pfp_pmcs;
377 pd = outp->pfp_pmds;
378
379 /* check event_cnt */
381 max_event_cnt = PFM_CELL_16BIT_CNTR_EVENT_MAX;
382 if (event_cnt < PFM_CELL_EVENT_MIN)
383 return PFMLIB_ERR_NOTFOUND;
384 if (event_cnt > max_event_cnt)
385 return PFMLIB_ERR_TOOMANY;
386
387 /* check signal type */
388 signal_cnt = check_signal_type(inp, mod_in, &group[0], &group[1]);
389 if (signal_cnt == PFMLIB_ERR_INVAL)
390 return PFMLIB_ERR_NOASSIGN;
391
392 /* decide debug_bus word */
393 if (signal_cnt != 0 && group[0].signal_type != NONE_SIGNAL) {
394 ret = get_debug_bus_word(&group[0], &group[1]);
395 if (ret != PFMLIB_SUCCESS)
396 return PFMLIB_ERR_NOASSIGN;
397 }
398
399 /* common register setting */
400 pc[pmcs_cnt].reg_num = REG_GROUP_CONTROL;
401 if (signal_cnt == 1) {
402 pc[pmcs_cnt].reg_value =
404 } else if (signal_cnt == 2) {
405 pc[pmcs_cnt].reg_value =
408 }
409 pmcs_cnt++;
410
411 pc[pmcs_cnt].reg_num = REG_DEBUG_BUS_CONTROL;
412 if (signal_cnt == 1) {
414 ((PFM_CELL_MAX_WORD_NUMBER - group[0].word) *
416 pc[pmcs_cnt].reg_value = group[0].freq << shift0;
417 } else if (signal_cnt == 2) {
419 ((PFM_CELL_MAX_WORD_NUMBER - group[0].word) *
422 ((PFM_CELL_MAX_WORD_NUMBER - group[1].word) *
424 pc[pmcs_cnt].reg_value = (group[0].freq << shift0) |
425 (group[1].freq << shift1);
426 }
428 pmcs_cnt++;
429
430 pc[pmcs_cnt].reg_num = REG_TRACE_ADDRESS;
431 pc[pmcs_cnt].reg_value = 0;
432 pmcs_cnt++;
433
434 pc[pmcs_cnt].reg_num = REG_EXT_TRACE_TIMER;
435 pc[pmcs_cnt].reg_value = 0;
436 pmcs_cnt++;
437
438 pc[pmcs_cnt].reg_num = REG_PM_STATUS;
439 pc[pmcs_cnt].reg_value = 0;
440 pmcs_cnt++;
441
442 pc[pmcs_cnt].reg_num = REG_PM_CONTROL;
443 pc[pmcs_cnt].reg_value =
444 (mod_in->control & ~PFM_CELL_PM_CONTROL_PPU_CNTR_MODE_MASK) |
446 pmcs_cnt++;
447
448 pc[pmcs_cnt].reg_num = REG_PM_INTERVAL;
449 pc[pmcs_cnt].reg_value = mod_in->interval;
450 pmcs_cnt++;
451
452 pc[pmcs_cnt].reg_num = REG_PM_START_STOP;
453 pc[pmcs_cnt].reg_value = mod_in->triggers;
454 pmcs_cnt++;
455
456 pmx_ctrl_bits = 0;
457
458 /* pmX register setting */
459 for(i = 0; i < event_cnt; i++) {
460 /* PMX_CONTROL */
462 &pmx_ctrl_bits);
463 if (pmx_offset == PFMLIB_ERR_INVAL) {
464 DPRINT("pmX already used\n");
465 return PFMLIB_ERR_INVAL;
466 }
467
470 pc[pmcs_cnt].reg_value = PM_COUNTER_CTRL_CYLES;
471 pc[pmcs_cnt].reg_num = REG_PM0_CONTROL + pmx_offset;
472 pmcs_cnt++;
473 pc[pmcs_cnt].reg_value = cell_pe[e[i].event].pme_code;
474 pc[pmcs_cnt].reg_num = REG_PM0_EVENT + pmx_offset;
475 pmcs_cnt++;
476 pd[i].reg_num = pmx_offset;
477 pd[i].reg_value = 0;
478 continue;
479 }
480
481 switch(cell_pe[e[i].event].pme_type) {
486 count_cycle = 1;
487 break;
488
490 count_cycle = 0;
491 break;
492
493 default:
494 return PFMLIB_ERR_INVAL;
495 }
496
497 signal_bit = get_signal_bit(cell_pe[e[i].event].pme_code);
498 polarity = mod_in->pfp_cell_counters[i].polarity;
499 input_control = mod_in->pfp_cell_counters[i].input_control;
500 subunit = 0;
503 }
504
505 pc[pmcs_cnt].reg_value = ( (signal_bit << (31 - 5))
506 | (input_control << (31 - 6))
507 | (polarity << (31 - 7))
508 | (count_cycle << (31 - 8))
509 | (count_enable << (31 - 9)) );
510 pc[pmcs_cnt].reg_num = REG_PM0_CONTROL + pmx_offset;
511
512 if (signal_type == group[1].signal_type && subunit == group[1].subunit) {
514 }
515
516 pmcs_cnt++;
517
518 /* PMX_EVENT */
519 pc[pmcs_cnt].reg_num = REG_PM0_EVENT + pmx_offset;
520
521 /* debug bus word setting */
522 if (signal_type == group[0].signal_type && subunit == group[0].subunit) {
523 pc[pmcs_cnt].reg_value = (cell_pe[e[i].event].pme_code |
524 (group[0].word << 48) | (subunit << 32));
525 } else if (signal_type == group[1].signal_type && subunit == group[1].subunit) {
526 pc[pmcs_cnt].reg_value = (cell_pe[e[i].event].pme_code |
527 (group[1].word << 48) | (subunit << 32));
528 } else if ((signal_type == SIGNAL_SPU_TRIGGER)
530 pc[pmcs_cnt].reg_value = cell_pe[e[i].event].pme_code | (subunit << 32);
531 } else {
532 return PFMLIB_ERR_INVAL;
533 }
534 pmcs_cnt++;
535
536 /* pmd setting */
537 pd[i].reg_num = pmx_offset;
538 pd[i].reg_value = 0;
539 }
540
541 outp->pfp_pmc_count = pmcs_cnt;
542 outp->pfp_pmd_count = event_cnt;
543
544 return PFMLIB_SUCCESS;
545}
546
547static int
548pfm_cell_dispatch_events(pfmlib_input_param_t *inp, void *model_in, pfmlib_output_param_t *outp, void *model_out)
549{
551 pfmlib_cell_input_param_t default_model_in;
552 int i;
553
554 if (model_in) {
555 mod_in = (pfmlib_cell_input_param_t *)model_in;
556 } else {
557 mod_in = &default_model_in;
558 mod_in->control = 0x80000000;
559 mod_in->interval = 0;
560 mod_in->triggers = 0;
561 for (i = 0; i < PMU_CELL_NUM_COUNTERS; i++) {
563 mod_in->pfp_cell_counters[i].spe_subunit = 0;
564 mod_in->pfp_cell_counters[i].polarity = 1;
565 mod_in->pfp_cell_counters[i].input_control = 0;
566 mod_in->pfp_cell_counters[i].cnt_mask = 0;
567 mod_in->pfp_cell_counters[i].flags = 0;
568 }
569 }
570
571 return pfm_cell_dispatch_counters(inp, mod_in, outp);
572}
573
574static int
575pfm_cell_get_event_code(unsigned int i, unsigned int cnt, int *code)
576{
577// if (cnt != PFMLIB_CNT_FIRST && cnt > 2) {
578 if (cnt != PFMLIB_CNT_FIRST && cnt > cell_support.num_cnt) {
579 return PFMLIB_ERR_INVAL;
580 }
581
582 *code = cell_pe[i].pme_code;
583
584 return PFMLIB_SUCCESS;
585}
586
587static void
589{
590 unsigned int i;
591
592 memset(counters, 0, sizeof(*counters));
593
594 for(i=0; i < PMU_CELL_NUM_COUNTERS; i++) {
595 pfm_regmask_set(counters, i);
596 }
597}
598
599static void
601{
602 unsigned int i;
603
604 memset(impl_pmcs, 0, sizeof(*impl_pmcs));
605
606 for(i=0; i < PFM_CELL_NUM_PMCS; i++) {
607 pfm_regmask_set(impl_pmcs, i);
608 }
609}
610
611static void
613{
614 unsigned int i;
615
616 memset(impl_pmds, 0, sizeof(*impl_pmds));
617
618 for(i=0; i < PMU_CELL_NUM_PERFCTR; i++) {
619 pfm_regmask_set(impl_pmds, i);
620 }
621}
622
623static void
625{
626 unsigned int i;
627
628 for(i=0; i < PMU_CELL_NUM_COUNTERS; i++) {
629 pfm_regmask_set(impl_counters, i);
630 }
631}
632
633static char*
635{
636 return cell_pe[i].pme_name;
637}
638
639static int
640pfm_cell_get_event_desc(unsigned int ev, char **str)
641{
642 char *s;
643
644 s = cell_pe[ev].pme_desc;
645 if (s) {
646 *str = strdup(s);
647 } else {
648 *str = NULL;
649 }
650 return PFMLIB_SUCCESS;
651}
652
653static int
655{
656 int i;
657
658 for (i = 0; i < PME_CELL_EVENT_COUNT; i++) {
659 if (!strcmp(cell_pe[i].pme_name, "CYCLES")) {
660 e->event = i;
661 return PFMLIB_SUCCESS;
662 }
663 }
664 return PFMLIB_ERR_NOTFOUND;
665}
666
667int pfm_cell_spe_event(unsigned int event_index)
668{
669 if (event_index >= PME_CELL_EVENT_COUNT)
670 return 0;
671
673}
674
676 .pmu_name = "CELL",
677 .pmu_type = PFMLIB_CELL_PMU,
678 .pme_count = PME_CELL_EVENT_COUNT,
679 .pmc_count = PFM_CELL_NUM_PMCS,
680 .pmd_count = PMU_CELL_NUM_PERFCTR,
681 .num_cnt = PMU_CELL_NUM_COUNTERS,
682 .get_event_code = pfm_cell_get_event_code,
683 .get_event_name = pfm_cell_get_event_name,
684 .get_event_counters = pfm_cell_get_event_counters,
685 .dispatch_events = pfm_cell_dispatch_events,
686 .pmu_detect = pfm_cell_detect,
687 .get_impl_pmcs = pfm_cell_get_impl_pmcs,
688 .get_impl_pmds = pfm_cell_get_impl_pmds,
689 .get_impl_counters = pfm_cell_get_impl_counters,
690 .get_event_desc = pfm_cell_get_event_desc,
691 .get_cycle_event = pfm_cell_get_cycle_event
692};
int i
double s
Definition: byte_profile.c:36
#define PME_CELL_EVENT_COUNT
Definition: cell_events.h:3079
static pme_cell_entry_t cell_pe[]
Definition: cell_events.h:24
static long count
uint32_t freq
uint16_t type
#define PFM_PLM2
Definition: pfmlib.h:52
static int pfm_regmask_set(pfmlib_regmask_t *h, unsigned int b)
Definition: pfmlib.h:321
#define PFMLIB_SUCCESS
Definition: pfmlib.h:283
#define PFM_PLM3
Definition: pfmlib.h:53
#define PFMLIB_ERR_NOTFOUND
Definition: pfmlib.h:287
#define PFMLIB_ERR_INVAL
Definition: pfmlib.h:285
#define PFMLIB_CELL_PMU
Definition: pfmlib.h:261
#define PFMLIB_ERR_TOOMANY
Definition: pfmlib.h:295
#define PFM_PLM0
Definition: pfmlib.h:50
#define PFMLIB_ERR_NOASSIGN
Definition: pfmlib.h:288
#define PFM_PLM1
Definition: pfmlib.h:51
#define PFMLIB_ERR_NOTSUPP
Definition: pfmlib.h:284
static unsigned int get_signal_type(unsigned long long event_code)
Definition: pfmlib_cell.c:217
static int pfm_cell_dispatch_counters(pfmlib_input_param_t *inp, pfmlib_cell_input_param_t *mod_in, pfmlib_output_param_t *outp)
Definition: pfmlib_cell.c:347
#define PFM_CELL_DEFAULT_TRIGGER_EVENT_UNIT
Definition: pfmlib_cell.c:62
static unsigned int get_signal_bit(unsigned long long event_code)
Definition: pfmlib_cell.c:222
static int pfm_cell_get_cycle_event(pfmlib_event_t *e)
Definition: pfmlib_cell.c:654
#define PFM_CELL_PM_CONTROL_PPU_CNTR_MODE_HYPERVISOR
Definition: pfmlib_cell.c:66
#define PFM_CELL_GRP_CONTROL_REG_GRP0_BIT
Definition: pfmlib_cell.c:56
#define ENABLE_WORD2
Definition: pfmlib_cell.c:54
#define PFM_CELL_32BIT_CNTR_EVENT_MAX
Definition: pfmlib_cell.c:48
static unsigned int get_ppu_count_mode(unsigned int plm)
Definition: pfmlib_cell.c:321
#define SIGNAL_TYPE_CYCLES
Definition: pfmlib_cell.c:39
#define PFM_CELL_NUM_PMCS
Definition: pfmlib_cell.c:42
static int pfm_cell_get_event_desc(unsigned int ev, char **str)
Definition: pfmlib_cell.c:640
#define PFM_CELL_EVENT_MIN
Definition: pfmlib_cell.c:43
#define PFM_CELL_PM_CONTROL_PPU_CNTR_MODE_SUPERVISOR
Definition: pfmlib_cell.c:65
static int get_debug_bus_word(struct pfm_cell_signal_group_desc *group0, struct pfm_cell_signal_group_desc *group1)
Definition: pfmlib_cell.c:165
#define ONLY_WORD(x)
Definition: pfmlib_cell.c:70
static void pfm_cell_get_impl_counters(pfmlib_regmask_t *impl_counters)
Definition: pfmlib_cell.c:624
static int pfm_cell_dispatch_events(pfmlib_input_param_t *inp, void *model_in, pfmlib_output_param_t *outp, void *model_out)
Definition: pfmlib_cell.c:548
static unsigned long long search_enable_word(int word)
Definition: pfmlib_cell.c:139
static int check_signal_type(pfmlib_input_param_t *inp, pfmlib_cell_input_param_t *mod_in, struct pfm_cell_signal_group_desc *group0, struct pfm_cell_signal_group_desc *group1)
Definition: pfmlib_cell.c:237
#define PFM_CELL_COUNTER_CONTROL_GRP1
Definition: pfmlib_cell.c:61
static void pfm_cell_get_event_counters(unsigned int j, pfmlib_regmask_t *counters)
Definition: pfmlib_cell.c:588
#define PFM_CELL_GRP_CONTROL_REG_GRP1_BIT
Definition: pfmlib_cell.c:57
#define PMX_MAX_NUM
Definition: pfmlib_cell.c:46
#define PFM_CELL_16BIT_CNTR_EVENT_MAX
Definition: pfmlib_cell.c:47
#define ENABLE_WORD1
Definition: pfmlib_cell.c:53
#define PFM_CELL_WORD_UNIT_FIELD_WIDTH
Definition: pfmlib_cell.c:59
#define PFM_CELL_PM_CONTROL_PPU_CNTR_MODE_ALL
Definition: pfmlib_cell.c:67
static int is_spe_signal_group(unsigned int signal_type)
Definition: pfmlib_cell.c:227
static int pfm_cell_detect(void)
Definition: pfmlib_cell.c:88
static char * pfm_cell_get_event_name(unsigned int i)
Definition: pfmlib_cell.c:634
#define PFM_CELL_PM_CONTROL_16BIT_CNTR_MASK
Definition: pfmlib_cell.c:63
#define swap_int(num1, num2)
Definition: pfmlib_cell.c:81
#define ENABLE_WORD0
Definition: pfmlib_cell.c:52
pfm_pmu_support_t cell_support
Definition: pfmlib_cell.c:675
static void pfm_cell_get_impl_pmds(pfmlib_regmask_t *impl_pmds)
Definition: pfmlib_cell.c:612
#define PFM_CELL_PM_CONTROL_PPU_CNTR_MODE_PROBLEM
Definition: pfmlib_cell.c:64
static int get_count_bit(unsigned int type)
Definition: pfmlib_cell.c:150
#define PMX_MIN_NUM
Definition: pfmlib_cell.c:45
#define PM_COUNTER_CTRL_CYLES
Definition: pfmlib_cell.c:40
static void pfm_cell_get_impl_pmcs(pfmlib_regmask_t *impl_pmcs)
Definition: pfmlib_cell.c:600
#define PFM_CELL_BASE_WORD_UNIT_FIELD_BIT
Definition: pfmlib_cell.c:58
int pfm_cell_spe_event(unsigned int event_index)
Definition: pfmlib_cell.c:667
static int pfm_cell_get_event_code(unsigned int i, unsigned int cnt, int *code)
Definition: pfmlib_cell.c:575
#define PFM_CELL_MAX_WORD_NUMBER
Definition: pfmlib_cell.c:60
static int get_pmx_offset(int pmx_num, unsigned int *pmx_ctrl_bits)
Definition: pfmlib_cell.c:105
#define PMU_CELL_NUM_PERFCTR
Definition: pfmlib_cell.h:32
#define PMU_CELL_NUM_COUNTERS
Definition: pfmlib_cell.h:30
#define COUNT_TYPE_SINGLE_CYCLE
#define REG_GROUP_CONTROL
#define WORD_0_AND_1
#define COUNT_TYPE_MULTI_CYCLE
#define NONE_SIGNAL
#define REG_EXT_TRACE_TIMER
#define PFM_CELL_PME_FREQ_SPU
#define REG_PM_INTERVAL
#define REG_PM_START_STOP
#define REG_PM_CONTROL
#define REG_PM_STATUS
#define COUNT_TYPE_CUMULATIVE_LEN
#define WORD_NONE
#define REG_PM0_EVENT
#define REG_PM0_CONTROL
#define WORD_0_AND_2
#define SIGNAL_SPU_EVENT
#define COUNT_TYPE_BOTH_TYPE
#define COUNT_TYPE_OCCURRENCE
#define REG_TRACE_ADDRESS
#define SIGNAL_SPU_TRIGGER
#define REG_DEBUG_BUS_CONTROL
#define pme_type
#define pme_code
int __pfm_getcpuinfo_attr(const char *attr, char *ret_buf, size_t maxlen)
#define DPRINT(fmt, a...)
Definition: pfmlib_priv.h:90
#define PFMLIB_CNT_FIRST
Definition: pfmlib_priv.h:62
unsigned long long freq
Definition: pfmlib_cell.c:77
unsigned long long word
Definition: pfmlib_cell.c:76
unsigned int num_cnt
Definition: pfmlib_priv.h:38
unsigned int cnt_mask
Definition: pfmlib_cell.h:39
unsigned int polarity
Definition: pfmlib_cell.h:37
unsigned int input_control
Definition: pfmlib_cell.h:38
unsigned int flags
Definition: pfmlib_cell.h:40
unsigned int pmX_control_num
Definition: pfmlib_cell.h:35
unsigned int spe_subunit
Definition: pfmlib_cell.h:36
pfmlib_cell_counter_t pfp_cell_counters[PMU_CELL_NUM_COUNTERS]
Definition: pfmlib_cell.h:50
unsigned int event
Definition: pfmlib.h:86
unsigned int pfp_dfl_plm
Definition: pfmlib.h:110
pfmlib_event_t pfp_events[PFMLIB_MAX_PMCS]
Definition: pfmlib.h:113
unsigned int pfp_event_count
Definition: pfmlib.h:109
pfmlib_reg_t pfp_pmds[PFMLIB_MAX_PMDS]
Definition: pfmlib.h:130
pfmlib_reg_t pfp_pmcs[PFMLIB_MAX_PMCS]
Definition: pfmlib.h:129
unsigned int pfp_pmc_count
Definition: pfmlib.h:127
unsigned int pfp_pmd_count
Definition: pfmlib.h:128
unsigned long long reg_value
Definition: pfmlib.h:98
unsigned int reg_num
Definition: pfmlib.h:100
unsigned int pme_enable_word
char * pme_desc
unsigned long long pme_code
unsigned int pme_freq
char * pme_name