typedef enum {
int id;
unsigned int warp_size;
unsigned int cc_major, cc_minor;
...
}
}
}
static papi_handle_t handle
returns handle of next device type
returns device attributes
returns device type attributes
#define PAPI_DEV_ATTR__ROCM_UINT_WG_DIM_Y
#define PAPI_DEV_ATTR__CUDA_UINT_THR_PER_BLK
#define PAPI_DEV_ATTR__CUDA_UINT_WARP_SIZE
#define PAPI_DEV_ATTR__CPU_UINT_L1D_CACHE_LINE_COUNT
#define PAPI_DEV_ATTR__ROCM_UINT_GRD_DIM_Y
#define PAPI_DEV_ATTR__ROCM_UINT_WAVE_PER_CU
#define PAPI_DEV_ATTR__CUDA_UINT_BLK_PER_SM
#define PAPI_DEV_ATTR__CUDA_ULONG_UID
#define PAPI_DEV_ATTR__CPU_UINT_FAMILY
#define PAPI_DEV_TYPE_ID__CUDA
#define PAPI_DEV_ATTR__CPU_UINT_SOCKET_COUNT
#define PAPI_DEV_TYPE_ATTR__INT_PAPI_ID
#define PAPI_DEV_ATTR__CPU_UINT_THR_PER_NUMA
#define PAPI_DEV_ATTR__CPU_UINT_L1I_CACHE_LINE_SIZE
#define PAPI_DEV_ATTR__CUDA_UINT_BLK_DIM_Z
#define PAPI_DEV_ATTR__ROCM_UINT_WAVEFRONT_SIZE
#define PAPI_DEV_ATTR__CUDA_UINT_UNIFIED_ADDR
#define PAPI_DEV_TYPE_ENUM__CUDA
#define PAPI_DEV_ATTR__CUDA_UINT_SM_COUNT
#define PAPI_DEV_ATTR__CPU_UINT_L3U_CACHE_ASSOC
#define PAPI_DEV_ATTR__CUDA_UINT_GRD_DIM_Y
#define PAPI_DEV_ATTR__CPU_UINT_L1I_CACHE_SIZE
#define PAPI_DEV_ATTR__CPU_UINT_L3U_CACHE_LINE_SIZE
#define PAPI_DEV_ATTR__CPU_UINT_THREAD_COUNT
#define PAPI_DEV_TYPE_ATTR__INT_COUNT
#define PAPI_DEV_ATTR__CPU_UINT_NUMA_COUNT
#define PAPI_DEV_ATTR__CPU_UINT_L1I_CACHE_LINE_COUNT
#define PAPI_DEV_ATTR__CUDA_UINT_MANAGED_MEM
#define PAPI_DEV_ATTR__CPU_UINT_L3U_CACHE_SIZE
#define PAPI_DEV_ATTR__ROCM_UINT_COMP_CAP_MINOR
#define PAPI_DEV_ATTR__CPU_UINT_L2U_CACHE_SIZE
#define PAPI_DEV_ATTR__CUDA_UINT_BLK_DIM_Y
#define PAPI_DEV_ATTR__ROCM_CHAR_DEVICE_NAME
#define PAPI_DEV_ATTR__CUDA_UINT_SHM_PER_BLK
#define PAPI_DEV_ATTR__ROCM_UINT_WORKGROUP_SIZE
#define PAPI_DEV_ATTR__CPU_UINT_L2U_CACHE_LINE_COUNT
#define PAPI_DEV_ATTR__ROCM_UINT_COMP_CAP_MAJOR
#define PAPI_DEV_ATTR__CPU_CHAR_NAME
#define PAPI_DEV_ATTR__CUDA_UINT_GRD_DIM_X
#define PAPI_DEV_ATTR__ROCM_ULONG_UID
#define PAPI_DEV_ATTR__CPU_UINT_L3U_CACHE_LINE_COUNT
#define PAPI_DEV_ATTR__CUDA_UINT_MEMCPY_OVERLAP
#define PAPI_DEV_ATTR__ROCM_UINT_SHM_PER_WG
#define PAPI_DEV_ATTR__CUDA_UINT_COMP_CAP_MINOR
#define PAPI_DEV_ATTR__CUDA_UINT_MAP_HOST_MEM
#define PAPI_DEV_ATTR__CPU_UINT_L1D_CACHE_ASSOC
#define PAPI_DEV_ATTR__CUDA_UINT_SHM_PER_SM
#define PAPI_DEV_ATTR__CPU_UINT_STEPPING
#define PAPI_DEV_ATTR__ROCM_UINT_CU_COUNT
#define PAPI_DEV_ATTR__CPU_UINT_THR_NUMA_AFFINITY
#define PAPI_DEV_ATTR__CUDA_UINT_BLK_DIM_X
#define PAPI_DEV_ATTR__CPU_UINT_NUMA_MEM_SIZE
#define PAPI_DEV_ATTR__ROCM_UINT_SIMD_PER_CU
#define PAPI_DEV_ATTR__ROCM_UINT_WG_DIM_X
#define PAPI_DEV_ATTR__CUDA_UINT_MULTI_KERNEL
#define PAPI_DEV_ATTR__CPU_UINT_L2U_CACHE_ASSOC
#define PAPI_DEV_ATTR__CUDA_UINT_GRD_DIM_Z
#define PAPI_DEV_ATTR__ROCM_UINT_GRD_DIM_X
#define PAPI_DEV_ATTR__CPU_UINT_L1D_CACHE_SIZE
#define PAPI_DEV_ATTR__CPU_UINT_MODEL
#define PAPI_DEV_ATTR__ROCM_UINT_WG_DIM_Z
#define PAPI_DEV_ATTR__ROCM_UINT_GRD_DIM_Z
#define PAPI_DEV_ATTR__CPU_UINT_L2U_CACHE_LINE_SIZE
#define PAPI_DEV_ATTR__CPU_UINT_CORE_COUNT
#define PAPI_DEV_TYPE_ENUM__CPU
#define PAPI_DEV_ATTR__CPU_UINT_L1I_CACHE_ASSOC
#define PAPI_DEV_ATTR__CPU_UINT_L1D_CACHE_LINE_SIZE
#define PAPI_DEV_ATTR__CUDA_CHAR_DEVICE_NAME
#define PAPI_DEV_ATTR__CUDA_UINT_COMP_CAP_MAJOR