PAPI 7.1.0.0
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intel_corei7_unc_events.h
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1/*
2 * Copyright (c) 2008 Google, Inc
3 * Contributed by Stephane Eranian <eranian@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in all
13 * copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
16 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
17 * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
18 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
19 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
20 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * This file is part of libpfm, a performance monitoring support library for
23 * applications on Linux.
24 */
25static pme_nhm_entry_t corei7_unc_pe[]={
26 /*
27 * BEGIN uncore events
28 */
29 { .pme_name = "UNC_CLK_UNHALTED",
30 .pme_desc = "Uncore clockticks.",
31 .pme_code = 0x0000,
32 .pme_flags = PFMLIB_NHM_UNC_FIXED,
33 },
34 { .pme_name = "UNC_DRAM_OPEN",
35 .pme_desc = "DRAM open comamnds issued for read or write",
36 .pme_code = 0x60,
37 .pme_flags = PFMLIB_NHM_UNC,
38 .pme_umasks = {
39 { .pme_uname = "CH0",
40 .pme_udesc = "DRAM Channel 0 open comamnds issued for read or write",
41 .pme_ucode = 0x01,
42 .pme_uflags = 0,
43 },
44 { .pme_uname = "CH1",
45 .pme_udesc = "DRAM Channel 1 open comamnds issued for read or write",
46 .pme_ucode = 0x02,
47 .pme_uflags = 0,
48 },
49 { .pme_uname = "CH2",
50 .pme_udesc = "DRAM Channel 2 open comamnds issued for read or write",
51 .pme_ucode = 0x04,
52 .pme_uflags = 0,
53 },
54 },
55 .pme_numasks = 3
56 },
57 { .pme_name = "UNC_DRAM_PAGE_CLOSE",
58 .pme_desc = "DRAM page close due to idle timer expiration",
59 .pme_code = 0x61,
60 .pme_flags = PFMLIB_NHM_UNC,
61 .pme_umasks = {
62 { .pme_uname = "CH0",
63 .pme_udesc = "DRAM Channel 0 page close",
64 .pme_ucode = 0x01,
65 .pme_uflags = 0,
66 },
67 { .pme_uname = "CH1",
68 .pme_udesc = "DRAM Channel 1 page close",
69 .pme_ucode = 0x02,
70 .pme_uflags = 0,
71 },
72 { .pme_uname = "CH2",
73 .pme_udesc = "DRAM Channel 2 page close",
74 .pme_ucode = 0x04,
75 .pme_uflags = 0,
76 },
77 },
78 .pme_numasks = 3
79 },
80 { .pme_name = "UNC_DRAM_PAGE_MISS",
81 .pme_desc = "DRAM Channel 0 page miss",
82 .pme_code = 0x62,
83 .pme_flags = PFMLIB_NHM_UNC,
84 .pme_umasks = {
85 { .pme_uname = "CH0",
86 .pme_udesc = "DRAM Channel 0 page miss",
87 .pme_ucode = 0x01,
88 .pme_uflags = 0,
89 },
90 { .pme_uname = "CH1",
91 .pme_udesc = "DRAM Channel 1 page miss",
92 .pme_ucode = 0x02,
93 .pme_uflags = 0,
94 },
95 { .pme_uname = "CH2",
96 .pme_udesc = "DRAM Channel 2 page miss",
97 .pme_ucode = 0x04,
98 .pme_uflags = 0,
99 },
100 },
101 .pme_numasks = 3
102 },
103 { .pme_name = "UNC_DRAM_PRE_ALL",
104 .pme_desc = "DRAM Channel 0 precharge all commands",
105 .pme_code = 0x66,
106 .pme_flags = PFMLIB_NHM_UNC,
107 .pme_umasks = {
108 { .pme_uname = "CH0",
109 .pme_udesc = "DRAM Channel 0 precharge all commands",
110 .pme_ucode = 0x01,
111 .pme_uflags = 0,
112 },
113 { .pme_uname = "CH1",
114 .pme_udesc = "DRAM Channel 1 precharge all commands",
115 .pme_ucode = 0x02,
116 .pme_uflags = 0,
117 },
118 { .pme_uname = "CH2",
119 .pme_udesc = "DRAM Channel 2 precharge all commands",
120 .pme_ucode = 0x04,
121 .pme_uflags = 0,
122 },
123 },
124 .pme_numasks = 3
125 },
126 { .pme_name = "UNC_DRAM_READ_CAS",
127 .pme_desc = "DRAM Channel 0 read CAS commands",
128 .pme_code = 0x63,
129 .pme_flags = PFMLIB_NHM_UNC,
130 .pme_umasks = {
131 { .pme_uname = "CH0",
132 .pme_udesc = "DRAM Channel 0 read CAS commands",
133 .pme_ucode = 0x01,
134 .pme_uflags = 0,
135 },
136 { .pme_uname = "AUTOPRE_CH0",
137 .pme_udesc = "DRAM Channel 0 read CAS auto page close commands",
138 .pme_ucode = 0x02,
139 .pme_uflags = 0,
140 },
141 { .pme_uname = "CH1",
142 .pme_udesc = "DRAM Channel 1 read CAS commands",
143 .pme_ucode = 0x04,
144 .pme_uflags = 0,
145 },
146 { .pme_uname = "AUTOPRE_CH1",
147 .pme_udesc = "DRAM Channel 1 read CAS auto page close commands",
148 .pme_ucode = 0x08,
149 .pme_uflags = 0,
150 },
151 { .pme_uname = "CH2",
152 .pme_udesc = "DRAM Channel 2 read CAS commands",
153 .pme_ucode = 0x10,
154 .pme_uflags = 0,
155 },
156 { .pme_uname = "AUTOPRE_CH2",
157 .pme_udesc = "DRAM Channel 2 read CAS auto page close commands",
158 .pme_ucode = 0x20,
159 .pme_uflags = 0,
160 },
161 },
162 .pme_numasks = 6
163 },
164 { .pme_name = "UNC_DRAM_REFRESH",
165 .pme_desc = "DRAM Channel 0 refresh commands",
166 .pme_code = 0x65,
167 .pme_flags = PFMLIB_NHM_UNC,
168 .pme_umasks = {
169 { .pme_uname = "CH0",
170 .pme_udesc = "DRAM Channel 0 refresh commands",
171 .pme_ucode = 0x01,
172 .pme_uflags = 0,
173 },
174 { .pme_uname = "CH1",
175 .pme_udesc = "DRAM Channel 1 refresh commands",
176 .pme_ucode = 0x02,
177 .pme_uflags = 0,
178 },
179 { .pme_uname = "CH2",
180 .pme_udesc = "DRAM Channel 2 refresh commands",
181 .pme_ucode = 0x04,
182 .pme_uflags = 0,
183 },
184 },
185 .pme_numasks = 3
186 },
187 { .pme_name = "UNC_DRAM_WRITE_CAS",
188 .pme_desc = "DRAM Channel 0 write CAS commands",
189 .pme_code = 0x64,
190 .pme_flags = PFMLIB_NHM_UNC,
191 .pme_umasks = {
192 { .pme_uname = "CH0",
193 .pme_udesc = "DRAM Channel 0 write CAS commands",
194 .pme_ucode = 0x01,
195 .pme_uflags = 0,
196 },
197 { .pme_uname = "AUTOPRE_CH0",
198 .pme_udesc = "DRAM Channel 0 write CAS auto page close commands",
199 .pme_ucode = 0x02,
200 .pme_uflags = 0,
201 },
202 { .pme_uname = "CH1",
203 .pme_udesc = "DRAM Channel 1 write CAS commands",
204 .pme_ucode = 0x04,
205 .pme_uflags = 0,
206 },
207 { .pme_uname = "AUTOPRE_CH1",
208 .pme_udesc = "DRAM Channel 1 write CAS auto page close commands",
209 .pme_ucode = 0x08,
210 .pme_uflags = 0,
211 },
212 { .pme_uname = "CH2",
213 .pme_udesc = "DRAM Channel 2 write CAS commands",
214 .pme_ucode = 0x10,
215 .pme_uflags = 0,
216 },
217 { .pme_uname = "AUTOPRE_CH2",
218 .pme_udesc = "DRAM Channel 2 write CAS auto page close commands",
219 .pme_ucode = 0x20,
220 .pme_uflags = 0,
221 },
222 },
223 .pme_numasks = 6
224 },
225 { .pme_name = "UNC_GQ_ALLOC",
226 .pme_desc = "GQ read tracker requests",
227 .pme_code = 0x03,
228 .pme_flags = PFMLIB_NHM_UNC,
229 .pme_umasks = {
230 { .pme_uname = "READ_TRACKER",
231 .pme_udesc = "GQ read tracker requests",
232 .pme_ucode = 0x01,
233 .pme_uflags = 0,
234 },
235 { .pme_uname = "RT_LLC_MISS",
236 .pme_udesc = "GQ read tracker LLC misses",
237 .pme_ucode = 0x02,
238 .pme_uflags = 0,
239 },
240 { .pme_uname = "RT_TO_LLC_RESP",
241 .pme_udesc = "GQ read tracker LLC requests",
242 .pme_ucode = 0x04,
243 .pme_uflags = 0,
244 },
245 { .pme_uname = "RT_TO_RTID_ACQUIRED",
246 .pme_udesc = "GQ read tracker LLC miss to RTID acquired",
247 .pme_ucode = 0x08,
248 .pme_uflags = 0,
249 },
250 { .pme_uname = "WT_TO_RTID_ACQUIRED",
251 .pme_udesc = "GQ write tracker LLC miss to RTID acquired",
252 .pme_ucode = 0x10,
253 .pme_uflags = 0,
254 },
255 { .pme_uname = "WRITE_TRACKER",
256 .pme_udesc = "GQ write tracker LLC misses",
257 .pme_ucode = 0x20,
258 .pme_uflags = 0,
259 },
260 { .pme_uname = "PEER_PROBE_TRACKER",
261 .pme_udesc = "GQ peer probe tracker requests",
262 .pme_ucode = 0x40,
263 .pme_uflags = 0,
264 },
265 },
266 .pme_numasks = 7
267 },
268 { .pme_name = "UNC_GQ_CYCLES_FULL",
269 .pme_desc = "Cycles GQ read tracker is full.",
270 .pme_code = 0x00,
271 .pme_flags = PFMLIB_NHM_UNC,
272 .pme_umasks = {
273 { .pme_uname = "READ_TRACKER",
274 .pme_udesc = "Cycles GQ read tracker is full.",
275 .pme_ucode = 0x01,
276 .pme_uflags = 0,
277 },
278 { .pme_uname = "WRITE_TRACKER",
279 .pme_udesc = "Cycles GQ write tracker is full.",
280 .pme_ucode = 0x02,
281 .pme_uflags = 0,
282 },
283 { .pme_uname = "PEER_PROBE_TRACKER",
284 .pme_udesc = "Cycles GQ peer probe tracker is full.",
285 .pme_ucode = 0x04,
286 .pme_uflags = 0,
287 },
288 },
289 .pme_numasks = 3
290 },
291 { .pme_name = "UNC_GQ_CYCLES_NOT_EMPTY",
292 .pme_desc = "Cycles GQ read tracker is busy",
293 .pme_code = 0x01,
294 .pme_flags = PFMLIB_NHM_UNC,
295 .pme_umasks = {
296 { .pme_uname = "READ_TRACKER",
297 .pme_udesc = "Cycles GQ read tracker is busy",
298 .pme_ucode = 0x01,
299 .pme_uflags = 0,
300 },
301 { .pme_uname = "WRITE_TRACKER",
302 .pme_udesc = "Cycles GQ write tracker is busy",
303 .pme_ucode = 0x02,
304 .pme_uflags = 0,
305 },
306 { .pme_uname = "PEER_PROBE_TRACKER",
307 .pme_udesc = "Cycles GQ peer probe tracker is busy",
308 .pme_ucode = 0x04,
309 .pme_uflags = 0,
310 },
311 },
312 .pme_numasks = 3
313 },
314 { .pme_name = "UNC_GQ_DATA",
315 .pme_desc = "Cycles GQ data is imported from Quickpath interface",
316 .pme_code = 0x04,
317 .pme_flags = PFMLIB_NHM_UNC,
318 .pme_umasks = {
319 { .pme_uname = "FROM_QPI",
320 .pme_udesc = "Cycles GQ data is imported from Quickpath interface",
321 .pme_ucode = 0x01,
322 .pme_uflags = 0,
323 },
324 { .pme_uname = "FROM_QMC",
325 .pme_udesc = "Cycles GQ data is imported from Quickpath memory interface",
326 .pme_ucode = 0x02,
327 .pme_uflags = 0,
328 },
329 { .pme_uname = "FROM_LLC",
330 .pme_udesc = "Cycles GQ data is imported from LLC",
331 .pme_ucode = 0x04,
332 .pme_uflags = 0,
333 },
334 { .pme_uname = "FROM_CORES_02",
335 .pme_udesc = "Cycles GQ data is imported from Cores 0 and 2",
336 .pme_ucode = 0x08,
337 .pme_uflags = 0,
338 },
339 { .pme_uname = "FROM_CORES_13",
340 .pme_udesc = "Cycles GQ data is imported from Cores 1 and 3",
341 .pme_ucode = 0x10,
342 .pme_uflags = 0,
343 },
344 { .pme_uname = "TO_QPI_QMC",
345 .pme_udesc = "Cycles GQ data sent to the QPI or QMC",
346 .pme_ucode = 0x01,
347 .pme_uflags = 0,
348 },
349 { .pme_uname = "TO_LLC",
350 .pme_udesc = "Cycles GQ data sent to LLC",
351 .pme_ucode = 0x02,
352 .pme_uflags = 0,
353 },
354 { .pme_uname = "TO_CORES",
355 .pme_udesc = "Cycles GQ data sent to cores",
356 .pme_ucode = 0x04,
357 .pme_uflags = 0,
358 },
359 },
360 .pme_numasks = 8
361 },
362 { .pme_name = "UNC_LLC_HITS",
363 .pme_desc = "Number of LLC read hits",
364 .pme_code = 0x08,
365 .pme_flags = PFMLIB_NHM_UNC,
366 .pme_umasks = {
367 { .pme_uname = "READ",
368 .pme_udesc = "Number of LLC read hits",
369 .pme_ucode = 0x01,
370 .pme_uflags = 0,
371 },
372 { .pme_uname = "WRITE",
373 .pme_udesc = "Number of LLC write hits",
374 .pme_ucode = 0x02,
375 .pme_uflags = 0,
376 },
377 { .pme_uname = "PROBE",
378 .pme_udesc = "Number of LLC peer probe hits",
379 .pme_ucode = 0x04,
380 .pme_uflags = 0,
381 },
382 { .pme_uname = "ANY",
383 .pme_udesc = "Number of LLC hits",
384 .pme_ucode = 0x03,
385 .pme_uflags = 0,
386 },
387 },
388 .pme_numasks = 4
389 },
390 { .pme_name = "UNC_LLC_LINES_IN",
391 .pme_desc = "LLC lines allocated in M state",
392 .pme_code = 0x0A,
393 .pme_flags = PFMLIB_NHM_UNC,
394 .pme_umasks = {
395 { .pme_uname = "M_STATE",
396 .pme_udesc = "LLC lines allocated in M state",
397 .pme_ucode = 0x01,
398 .pme_uflags = 0,
399 },
400 { .pme_uname = "E_STATE",
401 .pme_udesc = "LLC lines allocated in E state",
402 .pme_ucode = 0x02,
403 .pme_uflags = 0,
404 },
405 { .pme_uname = "S_STATE",
406 .pme_udesc = "LLC lines allocated in S state",
407 .pme_ucode = 0x04,
408 .pme_uflags = 0,
409 },
410 { .pme_uname = "F_STATE",
411 .pme_udesc = "LLC lines allocated in F state",
412 .pme_ucode = 0x08,
413 .pme_uflags = 0,
414 },
415 { .pme_uname = "ANY",
416 .pme_udesc = "LLC lines allocated",
417 .pme_ucode = 0x0F,
418 .pme_uflags = 0,
419 },
420 },
421 .pme_numasks = 5
422 },
423 { .pme_name = "UNC_LLC_LINES_OUT",
424 .pme_desc = "LLC lines victimized in M state",
425 .pme_code = 0x0B,
426 .pme_flags = PFMLIB_NHM_UNC,
427 .pme_umasks = {
428 { .pme_uname = "M_STATE",
429 .pme_udesc = "LLC lines victimized in M state",
430 .pme_ucode = 0x01,
431 .pme_uflags = 0,
432 },
433 { .pme_uname = "E_STATE",
434 .pme_udesc = "LLC lines victimized in E state",
435 .pme_ucode = 0x02,
436 .pme_uflags = 0,
437 },
438 { .pme_uname = "S_STATE",
439 .pme_udesc = "LLC lines victimized in S state",
440 .pme_ucode = 0x04,
441 .pme_uflags = 0,
442 },
443 { .pme_uname = "I_STATE",
444 .pme_udesc = "LLC lines victimized in I state",
445 .pme_ucode = 0x08,
446 .pme_uflags = 0,
447 },
448 { .pme_uname = "F_STATE",
449 .pme_udesc = "LLC lines victimized in F state",
450 .pme_ucode = 0x10,
451 .pme_uflags = 0,
452 },
453 { .pme_uname = "ANY",
454 .pme_udesc = "LLC lines victimized",
455 .pme_ucode = 0x1F,
456 .pme_uflags = 0,
457 },
458 },
459 .pme_numasks = 6
460 },
461 { .pme_name = "UNC_LLC_MISS",
462 .pme_desc = "Number of LLC read misses",
463 .pme_code = 0x09,
464 .pme_flags = PFMLIB_NHM_UNC,
465 .pme_umasks = {
466 { .pme_uname = "READ",
467 .pme_udesc = "Number of LLC read misses",
468 .pme_ucode = 0x01,
469 .pme_uflags = 0,
470 },
471 { .pme_uname = "WRITE",
472 .pme_udesc = "Number of LLC write misses",
473 .pme_ucode = 0x02,
474 .pme_uflags = 0,
475 },
476 { .pme_uname = "PROBE",
477 .pme_udesc = "Number of LLC peer probe misses",
478 .pme_ucode = 0x04,
479 .pme_uflags = 0,
480 },
481 { .pme_uname = "ANY",
482 .pme_udesc = "Number of LLC misses",
483 .pme_ucode = 0x03,
484 .pme_uflags = 0,
485 },
486 },
487 .pme_numasks = 4
488 },
489 { .pme_name = "UNC_QHL_ADDRESS_CONFLICTS",
490 .pme_desc = "QHL 2 way address conflicts",
491 .pme_code = 0x24,
492 .pme_flags = PFMLIB_NHM_UNC,
493 .pme_umasks = {
494 { .pme_uname = "2WAY",
495 .pme_udesc = "QHL 2 way address conflicts",
496 .pme_ucode = 0x02,
497 .pme_uflags = 0,
498 },
499 { .pme_uname = "3WAY",
500 .pme_udesc = "QHL 3 way address conflicts",
501 .pme_ucode = 0x04,
502 .pme_uflags = 0,
503 },
504 },
505 .pme_numasks = 2
506 },
507 { .pme_name = "UNC_QHL_CONFLICT_CYCLES",
508 .pme_desc = "QHL IOH Tracker conflict cycles",
509 .pme_code = 0x25,
510 .pme_flags = PFMLIB_NHM_UNC,
511 .pme_umasks = {
512 { .pme_uname = "IOH",
513 .pme_udesc = "QHL IOH Tracker conflict cycles",
514 .pme_ucode = 0x01,
515 .pme_uflags = 0,
516 },
517 { .pme_uname = "REMOTE",
518 .pme_udesc = "QHL Remote Tracker conflict cycles",
519 .pme_ucode = 0x02,
520 .pme_uflags = 0,
521 },
522 { .pme_uname = "LOCAL",
523 .pme_udesc = "QHL Local Tracker conflict cycles",
524 .pme_ucode = 0x04,
525 .pme_uflags = 0,
526 },
527 },
528 .pme_numasks = 3
529 },
530 { .pme_name = "UNC_QHL_CYCLES_FULL",
531 .pme_desc = "Cycles QHL Remote Tracker is full",
532 .pme_code = 0x21,
533 .pme_flags = PFMLIB_NHM_UNC,
534 .pme_umasks = {
535 { .pme_uname = "REMOTE",
536 .pme_udesc = "Cycles QHL Remote Tracker is full",
537 .pme_ucode = 0x02,
538 .pme_uflags = 0,
539 },
540 { .pme_uname = "LOCAL",
541 .pme_udesc = "Cycles QHL Local Tracker is full",
542 .pme_ucode = 0x04,
543 .pme_uflags = 0,
544 },
545 { .pme_uname = "IOH",
546 .pme_udesc = "Cycles QHL IOH Tracker is full",
547 .pme_ucode = 0x01,
548 .pme_uflags = 0,
549 },
550 },
551 .pme_numasks = 3
552 },
553 { .pme_name = "UNC_QHL_CYCLES_NOT_EMPTY",
554 .pme_desc = "Cycles QHL Tracker is not empty",
555 .pme_code = 0x22,
556 .pme_flags = PFMLIB_NHM_UNC,
557 .pme_umasks = {
558 { .pme_uname = "IOH",
559 .pme_udesc = "Cycles QHL IOH is busy",
560 .pme_ucode = 0x01,
561 .pme_uflags = 0,
562 },
563 { .pme_uname = "REMOTE",
564 .pme_udesc = "Cycles QHL Remote Tracker is busy",
565 .pme_ucode = 0x02,
566 .pme_uflags = 0,
567 },
568 { .pme_uname = "LOCAL",
569 .pme_udesc = "Cycles QHL Local Tracker is busy",
570 .pme_ucode = 0x04,
571 .pme_uflags = 0,
572 },
573 },
574 .pme_numasks = 3
575 },
576 { .pme_name = "UNC_QHL_FRC_ACK_CNFLTS",
577 .pme_desc = "QHL FrcAckCnflts sent to local home",
578 .pme_code = 0x33,
579 .pme_flags = PFMLIB_NHM_UNC,
580 .pme_umasks = {
581 { .pme_uname = "LOCAL",
582 .pme_udesc = "QHL FrcAckCnflts sent to local home",
583 .pme_ucode = 0x04,
584 .pme_uflags = 0,
585 },
586 },
587 .pme_numasks = 1
588 },
589 { .pme_name = "UNC_QHL_OCCUPANCY",
590 .pme_desc = "Cycles QHL Tracker Allocate to Deallocate Read Occupancy",
591 .pme_code = 0x23,
592 .pme_flags = PFMLIB_NHM_UNC,
593 .pme_umasks = {
594 { .pme_uname = "IOH",
595 .pme_udesc = "Cycles QHL IOH Tracker Allocate to Deallocate Read Occupancy",
596 .pme_ucode = 0x01,
597 .pme_uflags = 0,
598 },
599 { .pme_uname = "REMOTE",
600 .pme_udesc = "Cycles QHL Remote Tracker Allocate to Deallocate Read Occupancy",
601 .pme_ucode = 0x02,
602 .pme_uflags = 0,
603 },
604 { .pme_uname = "LOCAL",
605 .pme_udesc = "Cycles QHL Local Tracker Allocate to Deallocate Read Occupancy",
606 .pme_ucode = 0x04,
607 .pme_uflags = 0,
608 },
609 },
610 .pme_numasks = 3
611 },
612 { .pme_name = "UNC_QHL_REQUESTS",
613 .pme_desc = "Quickpath Home Logic local read requests",
614 .pme_code = 0x20,
615 .pme_flags = PFMLIB_NHM_UNC,
616 .pme_umasks = {
617 { .pme_uname = "LOCAL_READS",
618 .pme_udesc = "Quickpath Home Logic local read requests",
619 .pme_ucode = 0x10,
620 .pme_uflags = 0,
621 },
622 { .pme_uname = "LOCAL_WRITES",
623 .pme_udesc = "Quickpath Home Logic local write requests",
624 .pme_ucode = 0x20,
625 .pme_uflags = 0,
626 },
627 { .pme_uname = "REMOTE_READS",
628 .pme_udesc = "Quickpath Home Logic remote read requests",
629 .pme_ucode = 0x04,
630 .pme_uflags = 0,
631 },
632 { .pme_uname = "IOH_READS",
633 .pme_udesc = "Quickpath Home Logic IOH read requests",
634 .pme_ucode = 0x01,
635 .pme_uflags = 0,
636 },
637 { .pme_uname = "IOH_WRITES",
638 .pme_udesc = "Quickpath Home Logic IOH write requests",
639 .pme_ucode = 0x02,
640 .pme_uflags = 0,
641 },
642 { .pme_uname = "REMOTE_WRITES",
643 .pme_udesc = "Quickpath Home Logic remote write requests",
644 .pme_ucode = 0x08,
645 .pme_uflags = 0,
646 },
647 },
648 .pme_numasks = 6
649 },
650 { .pme_name = "UNC_QHL_TO_QMC_BYPASS",
651 .pme_desc = "Number of requests to QMC that bypass QHL",
652 .pme_code = 0x0126,
653 .pme_flags = PFMLIB_NHM_UNC,
654 },
655 { .pme_name = "UNC_QMC_BUSY",
656 .pme_desc = "Cycles QMC busy with a read request",
657 .pme_code = 0x29,
658 .pme_flags = PFMLIB_NHM_UNC,
659 .pme_umasks = {
660 { .pme_uname = "READ_CH0",
661 .pme_udesc = "Cycles QMC channel 0 busy with a read request",
662 .pme_ucode = 0x01,
663 .pme_uflags = 0,
664 },
665 { .pme_uname = "READ_CH1",
666 .pme_udesc = "Cycles QMC channel 1 busy with a read request",
667 .pme_ucode = 0x02,
668 .pme_uflags = 0,
669 },
670 { .pme_uname = "READ_CH2",
671 .pme_udesc = "Cycles QMC channel 2 busy with a read request",
672 .pme_ucode = 0x04,
673 .pme_uflags = 0,
674 },
675 { .pme_uname = "WRITE_CH0",
676 .pme_udesc = "Cycles QMC channel 0 busy with a write request",
677 .pme_ucode = 0x08,
678 .pme_uflags = 0,
679 },
680 { .pme_uname = "WRITE_CH1",
681 .pme_udesc = "Cycles QMC channel 1 busy with a write request",
682 .pme_ucode = 0x10,
683 .pme_uflags = 0,
684 },
685 { .pme_uname = "WRITE_CH2",
686 .pme_udesc = "Cycles QMC channel 2 busy with a write request",
687 .pme_ucode = 0x20,
688 .pme_uflags = 0,
689 },
690 },
691 .pme_numasks = 6
692 },
693 { .pme_name = "UNC_QMC_CANCEL",
694 .pme_desc = "QMC cancels",
695 .pme_code = 0x30,
696 .pme_flags = PFMLIB_NHM_UNC,
697 .pme_umasks = {
698 { .pme_uname = "CH0",
699 .pme_udesc = "QMC channel 0 cancels",
700 .pme_ucode = 0x01,
701 .pme_uflags = 0,
702 },
703 { .pme_uname = "CH1",
704 .pme_udesc = "QMC channel 1 cancels",
705 .pme_ucode = 0x02,
706 .pme_uflags = 0,
707 },
708 { .pme_uname = "CH2",
709 .pme_udesc = "QMC channel 2 cancels",
710 .pme_ucode = 0x04,
711 .pme_uflags = 0,
712 },
713 { .pme_uname = "ANY",
714 .pme_udesc = "QMC cancels",
715 .pme_ucode = 0x07,
716 .pme_uflags = 0,
717 },
718 },
719 .pme_numasks = 4
720 },
721 { .pme_name = "UNC_QMC_CRITICAL_PRIORITY_READS",
722 .pme_desc = "QMC critical priority read requests",
723 .pme_code = 0x2E,
724 .pme_flags = PFMLIB_NHM_UNC,
725 .pme_umasks = {
726 { .pme_uname = "CH0",
727 .pme_udesc = "QMC channel 0 critical priority read requests",
728 .pme_ucode = 0x01,
729 .pme_uflags = 0,
730 },
731 { .pme_uname = "CH1",
732 .pme_udesc = "QMC channel 1 critical priority read requests",
733 .pme_ucode = 0x02,
734 .pme_uflags = 0,
735 },
736 { .pme_uname = "CH2",
737 .pme_udesc = "QMC channel 2 critical priority read requests",
738 .pme_ucode = 0x04,
739 .pme_uflags = 0,
740 },
741 { .pme_uname = "ANY",
742 .pme_udesc = "QMC critical priority read requests",
743 .pme_ucode = 0x07,
744 .pme_uflags = 0,
745 },
746 },
747 .pme_numasks = 4
748 },
749 { .pme_name = "UNC_QMC_HIGH_PRIORITY_READS",
750 .pme_desc = "QMC high priority read requests",
751 .pme_code = 0x2D,
752 .pme_flags = PFMLIB_NHM_UNC,
753 .pme_umasks = {
754 { .pme_uname = "CH0",
755 .pme_udesc = "QMC channel 0 high priority read requests",
756 .pme_ucode = 0x01,
757 .pme_uflags = 0,
758 },
759 { .pme_uname = "CH1",
760 .pme_udesc = "QMC channel 1 high priority read requests",
761 .pme_ucode = 0x02,
762 .pme_uflags = 0,
763 },
764 { .pme_uname = "CH2",
765 .pme_udesc = "QMC channel 2 high priority read requests",
766 .pme_ucode = 0x04,
767 .pme_uflags = 0,
768 },
769 { .pme_uname = "ANY",
770 .pme_udesc = "QMC high priority read requests",
771 .pme_ucode = 0x07,
772 .pme_uflags = 0,
773 },
774 },
775 .pme_numasks = 4
776 },
777 { .pme_name = "UNC_QMC_ISOC_FULL",
778 .pme_desc = "Cycles DRAM full with isochronous read requests",
779 .pme_code = 0x28,
780 .pme_flags = PFMLIB_NHM_UNC,
781 .pme_umasks = {
782 { .pme_uname = "READ_CH0",
783 .pme_udesc = "Cycles DRAM channel 0 full with isochronous read requests",
784 .pme_ucode = 0x01,
785 .pme_uflags = 0,
786 },
787 { .pme_uname = "READ_CH1",
788 .pme_udesc = "Cycles DRAM channel 1 full with isochronous read requests",
789 .pme_ucode = 0x02,
790 .pme_uflags = 0,
791 },
792 { .pme_uname = "READ_CH2",
793 .pme_udesc = "Cycles DRAM channel 2 full with ISOC read requests",
794 .pme_ucode = 0x04,
795 .pme_uflags = 0,
796 },
797 { .pme_uname = "WRITE_CH0",
798 .pme_udesc = "Cycles DRAM channel 0 full with ISOC write requests",
799 .pme_ucode = 0x08,
800 .pme_uflags = 0,
801 },
802 { .pme_uname = "WRITE_CH1",
803 .pme_udesc = "Cycles DRAM channel 1 full with ISOC write requests",
804 .pme_ucode = 0x10,
805 .pme_uflags = 0,
806 },
807 { .pme_uname = "WRITE_CH2",
808 .pme_udesc = "Cycles DRAM channel 2 full with ISOC write requests",
809 .pme_ucode = 0x20,
810 .pme_uflags = 0,
811 },
812 },
813 .pme_numasks = 6
814 },
815 { .pme_name = "UNC_IMC_ISOC_OCCUPANCY",
816 .pme_desc = "IMC isochronous (ISOC) Read Occupancy",
817 .pme_code = 0x2B,
818 .pme_flags = PFMLIB_NHM_UNC,
819 .pme_umasks = {
820 { .pme_uname = "CH0",
821 .pme_udesc = "IMC channel 0 isochronous read request occupancy",
822 .pme_ucode = 0x01,
823 .pme_uflags = 0,
824 },
825 { .pme_uname = "CH1",
826 .pme_udesc = "IMC channel 1 isochronous read request occupancy",
827 .pme_ucode = 0x02,
828 .pme_uflags = 0,
829 },
830 { .pme_uname = "CH2",
831 .pme_udesc = "IMC channel 2 isochronous read request occupancy",
832 .pme_ucode = 0x04,
833 .pme_uflags = 0,
834 },
835 { .pme_uname = "ANY",
836 .pme_udesc = "IMC any channel isochronous read request occupancy",
837 .pme_ucode = 0x07,
838 .pme_uflags = 0,
839 },
840 },
841 .pme_numasks = 4
842 },
843 { .pme_name = "UNC_QMC_NORMAL_FULL",
844 .pme_desc = "Cycles DRAM full with normal read requests",
845 .pme_code = 0x27,
846 .pme_flags = PFMLIB_NHM_UNC,
847 .pme_umasks = {
848 { .pme_uname = "READ_CH0",
849 .pme_udesc = "Cycles DRAM channel 0 full with normal read requests",
850 .pme_ucode = 0x01,
851 .pme_uflags = 0,
852 },
853 { .pme_uname = "READ_CH1",
854 .pme_udesc = "Cycles DRAM channel 1 full with normal read requests",
855 .pme_ucode = 0x02,
856 .pme_uflags = 0,
857 },
858 { .pme_uname = "READ_CH2",
859 .pme_udesc = "Cycles DRAM channel 2 full with normal read requests",
860 .pme_ucode = 0x04,
861 .pme_uflags = 0,
862 },
863 { .pme_uname = "WRITE_CH0",
864 .pme_udesc = "Cycles DRAM channel 0 full with normal write requests",
865 .pme_ucode = 0x08,
866 .pme_uflags = 0,
867 },
868 { .pme_uname = "WRITE_CH1",
869 .pme_udesc = "Cycles DRAM channel 1 full with normal write requests",
870 .pme_ucode = 0x10,
871 .pme_uflags = 0,
872 },
873 { .pme_uname = "WRITE_CH2",
874 .pme_udesc = "Cycles DRAM channel 2 full with normal write requests",
875 .pme_ucode = 0x20,
876 .pme_uflags = 0,
877 },
878 },
879 .pme_numasks = 6
880 },
881 { .pme_name = "UNC_QMC_NORMAL_READS",
882 .pme_desc = "QMC normal read requests",
883 .pme_code = 0x2C,
884 .pme_flags = PFMLIB_NHM_UNC,
885 .pme_umasks = {
886 { .pme_uname = "CH0",
887 .pme_udesc = "QMC channel 0 normal read requests",
888 .pme_ucode = 0x01,
889 .pme_uflags = 0,
890 },
891 { .pme_uname = "CH1",
892 .pme_udesc = "QMC channel 1 normal read requests",
893 .pme_ucode = 0x02,
894 .pme_uflags = 0,
895 },
896 { .pme_uname = "CH2",
897 .pme_udesc = "QMC channel 2 normal read requests",
898 .pme_ucode = 0x04,
899 .pme_uflags = 0,
900 },
901 { .pme_uname = "ANY",
902 .pme_udesc = "QMC normal read requests",
903 .pme_ucode = 0x07,
904 .pme_uflags = 0,
905 },
906 },
907 .pme_numasks = 4
908 },
909 { .pme_name = "UNC_QMC_OCCUPANCY",
910 .pme_desc = "QMC Occupancy",
911 .pme_code = 0x2A,
912 .pme_flags = PFMLIB_NHM_UNC,
913 .pme_umasks = {
914 { .pme_uname = "CH0",
915 .pme_udesc = "IMC channel 0 normal read request occupancy",
916 .pme_ucode = 0x01,
917 .pme_uflags = 0,
918 },
919 { .pme_uname = "CH1",
920 .pme_udesc = "IMC channel 1 normal read request occupancy",
921 .pme_ucode = 0x02,
922 .pme_uflags = 0,
923 },
924 { .pme_uname = "CH2",
925 .pme_udesc = "IMC channel 2 normal read request occupancy",
926 .pme_ucode = 0x04,
927 .pme_uflags = 0,
928 },
929 },
930 .pme_numasks = 3
931 },
932 { .pme_name = "UNC_QMC_PRIORITY_UPDATES",
933 .pme_desc = "QMC priority updates",
934 .pme_code = 0x31,
935 .pme_flags = PFMLIB_NHM_UNC,
936 .pme_umasks = {
937 { .pme_uname = "CH0",
938 .pme_udesc = "QMC channel 0 priority updates",
939 .pme_ucode = 0x01,
940 .pme_uflags = 0,
941 },
942 { .pme_uname = "CH1",
943 .pme_udesc = "QMC channel 1 priority updates",
944 .pme_ucode = 0x02,
945 .pme_uflags = 0,
946 },
947 { .pme_uname = "CH2",
948 .pme_udesc = "QMC channel 2 priority updates",
949 .pme_ucode = 0x04,
950 .pme_uflags = 0,
951 },
952 { .pme_uname = "ANY",
953 .pme_udesc = "QMC priority updates",
954 .pme_ucode = 0x07,
955 .pme_uflags = 0,
956 },
957 },
958 .pme_numasks = 4
959 },
960 { .pme_name = "UNC_QMC_WRITES",
961 .pme_desc = "QMC full cache line writes",
962 .pme_code = 0x2F,
963 .pme_flags = PFMLIB_NHM_UNC,
964 .pme_umasks = {
965 { .pme_uname = "FULL_CH0",
966 .pme_udesc = "QMC channel 0 full cache line writes",
967 .pme_ucode = 0x01,
968 .pme_uflags = 0,
969 },
970 { .pme_uname = "FULL_CH1",
971 .pme_udesc = "QMC channel 1 full cache line writes",
972 .pme_ucode = 0x02,
973 .pme_uflags = 0,
974 },
975 { .pme_uname = "FULL_CH2",
976 .pme_udesc = "QMC channel 2 full cache line writes",
977 .pme_ucode = 0x04,
978 .pme_uflags = 0,
979 },
980 { .pme_uname = "FULL_ANY",
981 .pme_udesc = "QMC full cache line writes",
982 .pme_ucode = 0x07,
983 .pme_uflags = 0,
984 },
985 { .pme_uname = "PARTIAL_CH0",
986 .pme_udesc = "QMC channel 0 partial cache line writes",
987 .pme_ucode = 0x08,
988 .pme_uflags = 0,
989 },
990 { .pme_uname = "PARTIAL_CH1",
991 .pme_udesc = "QMC channel 1 partial cache line writes",
992 .pme_ucode = 0x10,
993 .pme_uflags = 0,
994 },
995 { .pme_uname = "PARTIAL_CH2",
996 .pme_udesc = "QMC channel 2 partial cache line writes",
997 .pme_ucode = 0x20,
998 .pme_uflags = 0,
999 },
1000 { .pme_uname = "PARTIAL_ANY",
1001 .pme_udesc = "QMC partial cache line writes",
1002 .pme_ucode = 0x38,
1003 .pme_uflags = 0,
1004 },
1005 },
1006 .pme_numasks = 8
1007 },
1008 { .pme_name = "UNC_QPI_RX_NO_PPT_CREDIT",
1009 .pme_desc = "Link 0 snoop stalls due to no PPT entry",
1010 .pme_code = 0x43,
1011 .pme_flags = PFMLIB_NHM_UNC,
1012 .pme_umasks = {
1013 { .pme_uname = "STALLS_LINK_0",
1014 .pme_udesc = "Link 0 snoop stalls due to no PPT entry",
1015 .pme_ucode = 0x01,
1016 .pme_uflags = 0,
1017 },
1018 { .pme_uname = "STALLS_LINK_1",
1019 .pme_udesc = "Link 1 snoop stalls due to no PPT entry",
1020 .pme_ucode = 0x02,
1021 .pme_uflags = 0,
1022 },
1023 },
1024 .pme_numasks = 2
1025 },
1026 { .pme_name = "UNC_QPI_TX_HEADER",
1027 .pme_desc = "Cycles link 0 outbound header busy",
1028 .pme_code = 0x42,
1029 .pme_flags = PFMLIB_NHM_UNC,
1030 .pme_umasks = {
1031 { .pme_uname = "BUSY_LINK_0",
1032 .pme_udesc = "Cycles link 0 outbound header busy",
1033 .pme_ucode = 0x02,
1034 .pme_uflags = 0,
1035 },
1036 { .pme_uname = "BUSY_LINK_1",
1037 .pme_udesc = "Cycles link 1 outbound header busy",
1038 .pme_ucode = 0x08,
1039 .pme_uflags = 0,
1040 },
1041 },
1042 .pme_numasks = 2
1043 },
1044 { .pme_name = "UNC_QPI_TX_STALLED_MULTI_FLIT",
1045 .pme_desc = "Cycles QPI outbound link 0 DRS stalled",
1046 .pme_code = 0x41,
1047 .pme_flags = PFMLIB_NHM_UNC,
1048 .pme_umasks = {
1049 { .pme_uname = "DRS_LINK_0",
1050 .pme_udesc = "Cycles QPI outbound link 0 DRS stalled",
1051 .pme_ucode = 0x01,
1052 .pme_uflags = 0,
1053 },
1054 { .pme_uname = "NCB_LINK_0",
1055 .pme_udesc = "Cycles QPI outbound link 0 NCB stalled",
1056 .pme_ucode = 0x02,
1057 .pme_uflags = 0,
1058 },
1059 { .pme_uname = "NCS_LINK_0",
1060 .pme_udesc = "Cycles QPI outbound link 0 NCS stalled",
1061 .pme_ucode = 0x04,
1062 .pme_uflags = 0,
1063 },
1064 { .pme_uname = "DRS_LINK_1",
1065 .pme_udesc = "Cycles QPI outbound link 1 DRS stalled",
1066 .pme_ucode = 0x08,
1067 .pme_uflags = 0,
1068 },
1069 { .pme_uname = "NCB_LINK_1",
1070 .pme_udesc = "Cycles QPI outbound link 1 NCB stalled",
1071 .pme_ucode = 0x10,
1072 .pme_uflags = 0,
1073 },
1074 { .pme_uname = "NCS_LINK_1",
1075 .pme_udesc = "Cycles QPI outbound link 1 NCS stalled",
1076 .pme_ucode = 0x20,
1077 .pme_uflags = 0,
1078 },
1079 { .pme_uname = "LINK_0",
1080 .pme_udesc = "Cycles QPI outbound link 0 multi flit stalled",
1081 .pme_ucode = 0x07,
1082 .pme_uflags = 0,
1083 },
1084 { .pme_uname = "LINK_1",
1085 .pme_udesc = "Cycles QPI outbound link 1 multi flit stalled",
1086 .pme_ucode = 0x38,
1087 .pme_uflags = 0,
1088 },
1089 },
1090 .pme_numasks = 8
1091 },
1092 { .pme_name = "UNC_QPI_TX_STALLED_SINGLE_FLIT",
1093 .pme_desc = "Cycles QPI outbound link 0 HOME stalled",
1094 .pme_code = 0x40,
1095 .pme_flags = PFMLIB_NHM_UNC,
1096 .pme_umasks = {
1097 { .pme_uname = "HOME_LINK_0",
1098 .pme_udesc = "Cycles QPI outbound link 0 HOME stalled",
1099 .pme_ucode = 0x01,
1100 .pme_uflags = 0,
1101 },
1102 { .pme_uname = "SNOOP_LINK_0",
1103 .pme_udesc = "Cycles QPI outbound link 0 SNOOP stalled",
1104 .pme_ucode = 0x02,
1105 .pme_uflags = 0,
1106 },
1107 { .pme_uname = "NDR_LINK_0",
1108 .pme_udesc = "Cycles QPI outbound link 0 NDR stalled",
1109 .pme_ucode = 0x04,
1110 .pme_uflags = 0,
1111 },
1112 { .pme_uname = "HOME_LINK_1",
1113 .pme_udesc = "Cycles QPI outbound link 1 HOME stalled",
1114 .pme_ucode = 0x08,
1115 .pme_uflags = 0,
1116 },
1117 { .pme_uname = "SNOOP_LINK_1",
1118 .pme_udesc = "Cycles QPI outbound link 1 SNOOP stalled",
1119 .pme_ucode = 0x10,
1120 .pme_uflags = 0,
1121 },
1122 { .pme_uname = "NDR_LINK_1",
1123 .pme_udesc = "Cycles QPI outbound link 1 NDR stalled",
1124 .pme_ucode = 0x20,
1125 .pme_uflags = 0,
1126 },
1127 { .pme_uname = "LINK_0",
1128 .pme_udesc = "Cycles QPI outbound link 0 single flit stalled",
1129 .pme_ucode = 0x07,
1130 .pme_uflags = 0,
1131 },
1132 { .pme_uname = "LINK_1",
1133 .pme_udesc = "Cycles QPI outbound link 1 single flit stalled",
1134 .pme_ucode = 0x38,
1135 .pme_uflags = 0,
1136 },
1137 },
1138 .pme_numasks = 8
1139 },
1140 { .pme_name = "UNC_SNP_RESP_TO_LOCAL_HOME",
1141 .pme_desc = "Local home snoop response - LLC does not have cache line",
1142 .pme_code = 0x06,
1143 .pme_flags = PFMLIB_NHM_UNC,
1144 .pme_umasks = {
1145 { .pme_uname = "I_STATE",
1146 .pme_udesc = "Local home snoop response - LLC does not have cache line",
1147 .pme_ucode = 0x01,
1148 .pme_uflags = 0,
1149 },
1150 { .pme_uname = "S_STATE",
1151 .pme_udesc = "Local home snoop response - LLC has cache line in S state",
1152 .pme_ucode = 0x02,
1153 .pme_uflags = 0,
1154 },
1155 { .pme_uname = "FWD_S_STATE",
1156 .pme_udesc = "Local home snoop response - LLC forwarding cache line in S state.",
1157 .pme_ucode = 0x04,
1158 .pme_uflags = 0,
1159 },
1160 { .pme_uname = "FWD_I_STATE",
1161 .pme_udesc = "Local home snoop response - LLC has forwarded a modified cache line",
1162 .pme_ucode = 0x08,
1163 .pme_uflags = 0,
1164 },
1165 { .pme_uname = "CONFLICT",
1166 .pme_udesc = "Local home conflict snoop response",
1167 .pme_ucode = 0x10,
1168 .pme_uflags = 0,
1169 },
1170 { .pme_uname = "WB",
1171 .pme_udesc = "Local home snoop response - LLC has cache line in the M state",
1172 .pme_ucode = 0x20,
1173 .pme_uflags = 0,
1174 },
1175 },
1176 .pme_numasks = 6
1177 },
1178 { .pme_name = "UNC_SNP_RESP_TO_REMOTE_HOME",
1179 .pme_desc = "Remote home snoop response - LLC does not have cache line",
1180 .pme_code = 0x07,
1181 .pme_flags = PFMLIB_NHM_UNC,
1182 .pme_umasks = {
1183 { .pme_uname = "I_STATE",
1184 .pme_udesc = "Remote home snoop response - LLC does not have cache line",
1185 .pme_ucode = 0x01,
1186 .pme_uflags = 0,
1187 },
1188 { .pme_uname = "S_STATE",
1189 .pme_udesc = "Remote home snoop response - LLC has cache line in S state",
1190 .pme_ucode = 0x02,
1191 .pme_uflags = 0,
1192 },
1193 { .pme_uname = "FWD_S_STATE",
1194 .pme_udesc = "Remote home snoop response - LLC forwarding cache line in S state.",
1195 .pme_ucode = 0x04,
1196 .pme_uflags = 0,
1197 },
1198 { .pme_uname = "FWD_I_STATE",
1199 .pme_udesc = "Remote home snoop response - LLC has forwarded a modified cache line",
1200 .pme_ucode = 0x08,
1201 .pme_uflags = 0,
1202 },
1203 { .pme_uname = "CONFLICT",
1204 .pme_udesc = "Remote home conflict snoop response",
1205 .pme_ucode = 0x10,
1206 .pme_uflags = 0,
1207 },
1208 { .pme_uname = "WB",
1209 .pme_udesc = "Remote home snoop response - LLC has cache line in the M state",
1210 .pme_ucode = 0x20,
1211 .pme_uflags = 0,
1212 },
1213 { .pme_uname = "HITM",
1214 .pme_udesc = "Remote home snoop response - LLC HITM",
1215 .pme_ucode = 0x24,
1216 .pme_uflags = 0,
1217 },
1218 },
1219 .pme_numasks = 7
1220 },
1221};
1222#define PME_COREI7_UNC_EVENT_COUNT (sizeof(corei7_unc_pe)/sizeof(pme_nhm_entry_t))
corei7_unc_pe
static pme_nhm_entry_t corei7_unc_pe[]
Definition: intel_corei7_unc_events.h:25
PFMLIB_NHM_UNC
#define PFMLIB_NHM_UNC
Definition: pfmlib_intel_nhm_priv.h:61
PFMLIB_NHM_UNC_FIXED
#define PFMLIB_NHM_UNC_FIXED
Definition: pfmlib_intel_nhm_priv.h:62
pme_nhm_entry_t
Definition: pfmlib_intel_nhm_priv.h:39
pme_nhm_entry_t::pme_name
char * pme_name
Definition: pfmlib_intel_nhm_priv.h:40